Reconfigurable field‐effect transistors, capable of being dynamically programmed during run‐time, overcome the static nature of conventional complementary metal‐oxide semiconductors by reducing the transistor count and the circuit path delay. Thereby, SiGe and Ge are predicted to boost drive currents, switching speed and to reduce power consumption. Nevertheless, Ge‐based reconfigurable field‐effect transistor prototypes have so far fallen short in reaching both the promised performance due to interface instability to their contacts and gate oxides, as well as in reaching the current–voltage symmetry necessary for circuit applicability. Here, a top‐down fabricated SiGe‐based reconfigurable transistor technology is reported that is comprised of a vertical Si‐Si_0.67Ge_0.33 heterostructure enabling the envisioned high and symmetric on‐currents of both n‐ and p‐type operation. Monolithic integration with single‐elementary crystalline Al contacts alleviates process variability compared to conventional Ni‐silicide/Ni‐germanide contacts and introduces an ultra‐thin Si interlayer providing stability and equal injection efficiency of holes and electrons. The implementation of a three top‐gate transistor in combination with a hysteresis‐free Si/SiO₂/HfO₂ gate stack enhances polarity control and leakage current suppression to limit static power dissipation. Importantly, the obtained Al‐Si‐SiGe multi‐heterojunction and advanced reconfigurable transistor design is the first Ge‐based technology showing the envisioned stability and performance enhancements.

Overcoming the difficulty in the precise definition of the metal phase of metal-Si heterostructures is among the key prerequisites to enable reproducible next-generation nanoelectronic, optoelectronic, and quantum devices. Here, we report on the formation of monolithic Al-Si heterostructures obtained from both bottom-up and top-down fabricated Si nanostructures and AI contacts. This is enabled by a thermally induced Al-Si exchange reaction, which forms abrupt and void-free metal-semiconductor interfaces in contrast to their bulk counterparts. The selective and controllable transformation of Si NWs into Al provides a nanodevice fabrication platform with high-quality monolithic and single-crystalline Al contacts, revealing resistivities as low as rho = (6.31 +/- 1.17) x 10(-8) Omega m and breakdown current densities of J(max) = (1 +/- 0.13) X 10(12) Omega m(-2). Combining transmission electron microscopy and energy-dispersive X-ray spectroscopy confirmed the composition as well as the crystalline nature of the presented Al-Si-Al heterostructures, with no intermetallic phases formed during the exchange process in contrast to state-of-the-art metal silicides. The thereof formed single-element Al contacts explain the robustness and reproducibility of the junctions. Detailed and systematic electrical characterizations carried out on back- and top-gated heterostructure devices revealed symmetric effective Schottky barriers for electrons and holes. Most importantly, fulfilling compatibility with modern complementary metal-oxide semiconductor fabrication, the proposed thermally induced Al-Si exchange reaction may give rise to the development of nextgeneration reconfigurabIe electronics relying on reproducible nanojunctions.

Si_1−xGe_xis a key material in modern complementary metal‐oxide‐semiconductor and bipolar devices. However, despite considerable efforts in metal‐silicide and ‐germanide compound material systems, reliability concerns have so far hindered the implementation of metal‐Si_1−xGe_xjunctions that are vital for diverse emerging “More than Moore” and quantum computing paradigms. In this respect, the systematic structural and electronic properties of Al‐Si_1−xGe_xheterostructures, obtained from a thermally induced exchange between ultra‐thin Si_1−xGe_xnanosheets and Al layers are reported. Remarkably, no intermetallic phases are found after the exchange process. Instead, abrupt, flat, and void‐free junctions of high structural quality can be obtained. Interestingly, ultra‐thin interfacial Si layers are formed between the metal and Si_1−xGe_xsegments, explaining the morphologic stability. Integrated into omega‐gated Schottky barrier transistors with the channel length being defined by the selective transformation of Si_1−xGe_xinto single‐elementary Al leads, a detailed analysis of the transport is conducted. In this respect, a report on a highly versatile platform with Si_1−xGe_xcomposition‐dependent properties ranging from highly transparent contacts to distinct Schottky barriers is provided. Most notably, the presented abrupt, robust, and reliable metal‐Si_1−xGe_xjunctions can open up new device implementations for different types of emerging nanoelectronic, optoelectronic, and quantum devices.

Conventional field‐effect transistor (FET) concepts are limited to static electrical functions and demand extraordinarily steep and reproducible doping concentration gradients. Reaching the physical limits of scaling, doping‐free reconfigurable field‐effect transistors (RFETs) capable of dynamically altering the device operation between p‐ or n‐type, even during runtime, are emerging device concepts. In this respect, Ge has been identified as a promising channel material to enable reduction of power consumption and switching delay of RFETs. Nevertheless, its use has been limited to simulations and bottom‐up demonstrators not compatible with complex circuit technology. In this work, a deterministic top‐down fabrication scheme is demonstrated to realize a Ge‐based RFET architecture and exploring realizations with three independent gates. Polarity control and leakage current suppression are enabled by the specific injection of charge carriers through gated Al‐Ge heterojunctions and the introduction of a blocking electrostatic energy barrier. Further, the choice of monolithic Al/Ge contacts alleviates process variability compared to Ni‐germanide contacts presenting a top‐down technology platform for Ge‐based RFETs. Our device concept is a first step toward future integrated high‐performance and low‐power reconfigurable circuits, providing a platform for future energy‐efficient systems as well as hardware security integrated circuits.

In the quest to push the contemporary scientific boundaries in nanoelectronics, Ge is considered a key building block extending device performances, delivering enhanced functionalities. In this work, a quasi‐1D monocrystalline and monolithic Al–Ge–Al nanowire heterostructure are embedded into a novel field‐effect transistor architecture capable of combining Ge based electronics with an electrostatically tunable negative differential resistance (NDR) distinctly observable at room temperature. In this regard, a detailed study of the key metrics of NDR in Ge is presented. Most notably, a highly efficient and low‐footprint platform is demonstrated, paving the way for potential applications such as fast switching multi‐valued logic devices, static memory cells, or high‐frequency oscillators, all implemented in one fully complementary metal–oxide–semiconductor compatible Al‐Ge based device platform.

The ability to stack nanosheet transistors is an important prerequisite for the realization of vertically monolithic 3D integrated circuits enabling higher integration densities of functions and novel circuit topologies that relax miniaturization constraints. In this respect, a wafer‐scale platform is presented embedding high‐quality nanoscale polycrystalline Ge channels into monolithic metal‐semiconductor heterostructures. Thereto, a fabrication scheme comprising a combination of flash lamp annealing, crystallizing ultra‐thin amorphous Ge nanosheets, and a thermally induced Al‐Ge exchange reaction is demonstrated, facilitating the formation of self‐aligned Al leads enabling sharp Al‐Ge heterojunctions. The high quality of the obtained polycrystalline Al‐Ge‐Al heterostructure nanosheets is confirmed by µ‐Raman, scanning transmission electron microscopy, energy‐dispersive X‐ray spectroscopy, and electron backscatter diffraction measurements. Embedded in back‐ and top‐gate field‐effect transistor architectures, the electrical transport in polycrystalline Al‐Ge‐Al heterostructures is systematically analyzed. Enabling a complementary metal‐oxide‐semiconductor compatible wafer‐scale accessibility of high‐quality polycrystalline Ge with self‐aligned Al contacts, the proposed platform significantly contributes to the development of a broad spectrum of emerging 3D integrated Ge nanodevices.