The compatibility of memristor materials with advanced complementary metal-oxide-semiconductor (CMOS) technology is a key factor for microelectronics element base manufacturing. Therefore, we continued studying previously fabricated CMOS-compatible Ni/Si₃N₄/SiO₂/p+-Si samples. We approximated volt-ampere characteristics (VAC) at different temperatures using the general form of the spatial charge-limiting current (SCLC) equation assuming exponential and Gaussian trap distribution within the band gap of Si₃N₄. Our approximation demonstrated better experimental data matching compared to previous work, where the approximation was based on the uniform trap distribution law. Further, we performed another additional sample measurement set of the samples to evaluate the parameters of the low-resistance state (LRS) variations at different temperatures. Analysis of these measurements allowed us to estimate the temperatures at which the samples will retain LRS for 10 years.