Graphene grown on a copper (Cu) substrate by chemical vapor deposition (CVD) is typically required to be transferred to another substrate for the fabrication of various electrical devices. PMMA-mediated wet process is the most widely used method for CVD-graphene-transfer. However, PMMA residue and wrinkles that inevitably remain on the graphene surface during the transfer process are critical issues degrading the electrical properties of graphene. In this paper, we report on a PMMA-mediated graphene-transfer method that can effectively reduce the density and size of the PMMA residue and the height of wrinkles on the transferred graphene layer. We found out that acetic acid is the most effective PMMA stripper among the typically used solutions to remove the PMMA residue. In addition, we observed that an optimized annealing process can reduce the height of the wrinkles on the transferred graphene layer without degrading the graphene quality. The effects of the suggested wet transfer process were also investigated by evaluating the electrical properties of field-effect transistors fabricated on the transferred graphene layer. The results of this work will contribute to the development of fabrication processes for high-quality graphene devices, given that the transfer of graphene from the Cu substrate is essential process to the application of CVD-graphene.

Finite element analysis provides visual insights into conductive path evolution in a SiO₂-based memristor. Electrochemical impedance spectroscopy experimentally validated the theoretical findings by interpreting with an equivalent circuit.

The UV-to-visible rejection ratio is one of the important figure of merits of GaN-based UV photodetectors. For cost-effectiveness and large-scale fabrication of GaN devices, we tried to grow a GaN epitaxial layer on silicon substrate with complicated buffer layers for a stress-release. It is known that the structure of the buffer layers affects the performance of devices fabricated on the GaN epitaxial layers. In this study, we show that the design of a buffer layer structure can make effect on the UV-to-visible rejection ratio of GaN UV photodetectors. The GaN photodetector fabricated on GaN-on-silicon substrate with a step-graded Al_xGa_−xN buffer layer has a highly-selective photoresponse at 365-nm wavelength. The UV-to-visible rejection ratio of the GaN UV photodetector with the step-graded Al_xGa_1−xN buffer layer was an order-of-magnitude higher than that of a photodetector with a conventional GaN/AlN multi buffer layer. The maximum photoresponsivity was as high as 5 × 10⁻² A/W. This result implies that the design of buffer layer is important for photoresponse characteristics of GaN UV photodetectors as well as the crystal quality of the GaN epitaxial layers.

Layer-release techniques for producing freestanding III-V epitaxial layers have been actively developed for heterointegration of single-crystalline compound semiconductors with Si platforms. However, for the release of target epitaxial layers from III-V heterostructures, it is required to embed a mechanically or chemically weak sacrificial buffer beneath the target layers. This requirement severely limits the scope of processable materials and their epi-structures and makes the growth and layer-release process complicated. Here, we report that epitaxial layers in commonly used III-V heterostructures can be precisely released with an atomic-scale surface flatness via a buffer-free separation technique. This result shows that heteroepitaxial interfaces of a normal lattice-matched III-V heterostructure can be mechanically separated without a sacrificial buffer and the target interface for separation can be selectively determined by adjusting process conditions. This technique of selective release of epitaxial layers in III-V heterostructures will provide high fabrication flexibility in compound semiconductor technology.

The fabrication of a single pixel sensor, which is a fundamental element device for the fabrication of an array-type pixel sensor, requires an integration technique of a photodetector and transistor on a wafer. In conventional GaN-based ultraviolet (UV) imaging devices, a hybrid-type integration process is typically utilized, which involves a backside substrate etching and a wafer-to-wafer bonding process. In this work, we developed a GaN-based UV passive pixel sensor (PPS) by integrating a GaN metal-semiconductor-metal (MSM) UV photodetector and a Schottky-barrier (SB) metal-oxide-semiconductor field-effect transistor (MOSFET) on an epitaxially grown GaN layer on silicon substrate. An MSM-type UV sensor had a low dark current density of 3.3 × 10⁻⁷ A/cm² and a high UV/visible rejection ratio of 10³. The GaN SB-MOSFET showed a normally-off operation and exhibited a maximum drain current of 0.5 mA/mm and a maximum transconductance of 30 μS/mm with a threshold voltage of 4.5 V. The UV PPS showed good UV response and a high dark-to-photo contrast ratio of 10³ under irradiation of 365-nm UV. This integration technique will provide one possible way for a monolithic integration of the GaN-based optoelectronic devices.