Resistive switching memory devices can be categorized into either filamentary or non-filamentary ones depending on the switching mechanisms. Both types have been investigated as novel synaptic devices in hardware neural networks, but there is a lack of comparative study between them, especially in random telegraph noise (RTN) which could induce large resistance fluctuations. In this letter, we analyze the amplitude and occurrence rate of RTN in both Ta ₂ O ₅ filamentary and TiO ₂ /a-Si (a-VMCO) non-filamentary resistive switching memory (RRAM) devices and evaluate its impact on the pattern recognition accuracy of neural networks. It is revealed that the non-filamentary RRAM has a tighter RTN amplitude distribution and much lower RTN occurrence rate than its filamentary counterpart, which leads to negligible RTN impact on recognition accuracy, making it a promising candidate in synaptic application.

In this paper, we propose and demonstrate a novel technique for true random number generator (TRNG) application using GeSe-based Ovonic threshold switching (OTS) selector devices. The inherent variability in OTS threshold voltage results in a bimodal distribution of on/off states which can be easily converted into digital bits. The experimental evaluation shows that the proposed TRNG enables the generation of high-quality random bits that passed 12 tests in the National Institute of Standards and Technology statistical test suite without complex external circuits for post-processing. The randomness is further evidenced by the prediction rate of ∼50% using machine learning algorithm. Compared with the TRNGs based on non-volatile memories, the volatile nature of OTS avoids the reset operation, thus further simplifying the operation and improving the generation frequency.

Ovonic threshold switching (OTS) selector is a promising candidate to suppress the sneak current paths in resistive switching random access memory (RRAM) arrays. Variations in the threshold voltage ( ${V} _{\text {th}}$ ), and the hold voltage ( ${V} _{\text {hd}}$ ) have been reported, but a quantitative analysis of the switching probability dependence on the OTS operation conditions is still missing. A novel characterization method is developed in this letter, and the time-to-switch- ON/OFF ( $\text{t}_{ \mathrm{\scriptscriptstyle ON}}/\text{t}_{ \mathrm{\scriptscriptstyle OFF}}$ ) at a constant ${V} _{\text {OTS}}$ is found following the Weibull distribution, based on which the dependence of switching probability on pulse bias and time can be extracted and extrapolated, and the switching probability can be ensured with appropriately chosen operation conditions. The difference between square and triangle switching pulses is also explained. This provides a practical guidance for predicting the switching probability under different operation conditions and for designing reliable one-selector-one-RRAM (1S1R) arrays.

Selector device is critical in high-density cross-point resistive switching memory arrays for suppressing the sneak leakage current path. Ge x Se 1-x based ovonic threshold switch (OTS) selectors have recently demonstrated strong performance with high on-state current, nonlinearity and endurance. Detailed study of its reliability is still lacking and the understanding on the responsible mechanisms is limited. In this work, for the first time, the endurance degradation mechanism of Ge-rich Ge x Se 1-x OTS is identified. Accumulation of slow defects that remain delocalized at off-state and GeSe segregation/crystallization during cycling lead to the recoverable and non-recoverable leakage current, respectively. Most importantly, a refreshing program scheme is developed to recover and prevent the OTS degradation and the endurance can be therefore improved by more than five orders without adding additional material elements or process steps.

Despite the tremendous efforts in the past decade devoted to the development of filamentary resistive-switching devices (RRAM), there is still a lack of in-depth understanding of its over-reset phenomenon. At higher reset stop voltages that exceed a certain threshold, the resistance at high resistance state reduces, leading to an irrecoverable window reduction. The over-reset phenomenon limits the maximum resistance window that can be achieved by using a higher V _reset , which also degrades its potential in applications such as multi-level memory and neuromorphic synapses. In this letter, the over-reset is investigated by cyclic reset operations with incremental stop voltages, and is explained by defect generation in the filament constriction region of Ta ₂ O ₅ RRAM devices. This is supported by the statistical spatial defects profile obtained from the random telegraph noise based defect probing technique. The impact of forming compliance current on the over-reset is also evaluated.

Ovonic threshold switching (OTS) selector is a promising candidate to suppress the sneak current paths in emerging memory arrays, but there is still a gap between its performance and the rigorous requirement from memory devices, especially its endurance improvement is hindered by insufficient understanding of the mechanism. In this work, cycling induced degradation of GeSe-based OTS selectors is studied with electrical characterization techniques. The existence of metastable state between the on- and off-state during cycling is observed and statistically analyzed alongside with the gradual off-state leakage current increase. Such metastable degradation may be attributed to the generation of unstable Ge-Ge bonds that might be induced by element segregation, which is also responsible for the higher off-state leakage current in GeSe selectors after large cycling or with higher Ge component. This work provides experimental guidance for optimizing OTS selectors.