Oxidation treatment creating a well-ordered crystalline structure has been shown to provide a major improvement for III–V semiconductor/oxide interfaces in electronics. We present this treatment’s effects on InSb(111)B surface and its electronic properties with scanning tunneling microscopy and spectroscopy. Possibility to oxidize (111)B surface with parameters similar to the ones used for (100) surface is found, indicating a generality of the crystalline oxidation among different crystal planes, crucial for utilization in nanotechnology. The outcome is strongly dependent on surface conditions and remarkably, the (111) plane can oxidize without changes in surface lattice symmetry, or alternatively, resulting in a complex, semicommensurate quasicrystal-like structure. The findings are of major significance for passivation via oxide termination for nano-structured III–V/oxide devices containing several crystal plane surfaces. As a proof-of-principle, we present a procedure where InSb(111)B surface is cleaned by simple HCl-etching, transferred via air, and post-annealed and oxidized in ultrahigh vacuum.

Properties of oxidized InP surfaces, which are known to cause less electrical and optical losses than other III–V oxides, are relevant to develop the passivation of current and future applications of III–V crystals (e.g. lasers, detectors). We report that a proper low-temperature (LT) (<400 °C) gas exposure with NH₃ or O₂ enables beneficial modifications of InP native oxides, of which formation is difficult to avoid in devices. Effects of the gas exposure depend on the doping of InP. NH₃ exposure without a plasma source at 250 °C or lower temperature increases photoluminescence (PL) intensity of native-oxide covered n-InP crystals, which interestingly provide a stronger PL signal than n-InP with the HCl-cleaned surface. In contrast, O₂ exposure around 300 °C increases PL signal of native-oxide covered p-type InP. Core-level photoelectron spectra reveal that N atoms are incorporated into the native oxide system of InPO₄/InP during LT NH₃ exposures. Scanning tunneling microscopy shows a band bending and a tendency to crystallization at native-oxide covered InP surfaces. Photoelectron spectra, which are analyzed with recent calculations, show larger variation in the bonding environment for the host In atoms and for incorporated N atoms, as compared to the P bonding sites in the InPO₄ native oxide.

Germanium is an excellent material candidate for various applications, such as field effect transistors and radiation detectors/multijunction solar cells, due to its high carrier mobilities and narrow bandgap, respectively. However, the efficient passivation of germanium surfaces remains challenging. Recently, the most promising results have been achieved with atomic-layer-deposited (ALD) Al₂O₃, but the obtainable surface recombination velocity (SRV) has been very sensitive to the surface state prior to deposition. Based on X-ray photoelectron spectroscopy (XPS) and low-energy electron diffraction (LEED), we show here that the poor SRV obtained with the combination of HF and DIW surface cleaning and ALD Al₂O₃ results from a Ge suboxide interlayer (GeO_x, x < 2) with compromised quality. Nevertheless, our results also demonstrate that both the composition and crystallinity of this oxide layer can be improved with a combination of low-temperature heating and a 300-Langmuir controlled oxidation in an ultrahigh vacuum (LT-UHV treatment). This results in a reduction in the interface defect density (D_it), allowing us to reach SRV values as low as 10 cm/s. Being compatible with most device processes due to the low thermal budget, the LT-UHV treatment could be easily integrated into many future devices and applications.

Current transport in polysilicon is a complicated process with many factors to consider. The inhomogeneous nature of polysilicon with its differently shaped and sized grains is one such consideration. We have developed a method that enhances existing resistivity models with a 2-D extension that incorporates the grain size distribution using a Voronoi-based resistor network. We obtain grain size distributions both from our growth simulations (700, 800, and 900 K) and experimental analysis. Applying our method, we investigate the effect that variation in grain size produces with cases of different average grain sizes (2 nm–3 $\mu$m). For example, the resistivity of polysilicon with an average grain size of 175 nm drops from 11 to 4.5 k$\Omega\cdot$cm when compared with conventional 1-D modeling. Our study highlights the strong effect of grain size variation on resistivity, revealing that wider distributions result in significant resistivity reductions of up to more than 50%. Due to larger grains present with a grain size distribution, current transport encounters fewer grain boundaries while the average grain size remains the same resulting in fewer barriers along the current transport path. Incorporating the grain structure into the resistivity modeling facilitates a more detailed and comprehensive characterization of the electrical properties of polysilicon.