Compared with full-SiC MOSFETs converters, the hybrid utilization of Si/SiC converters is an alternative approach to achieve the tradeoff between performance and cost. In this paper, a 2-SiC hybrid five-level active neutral-point-clamped (5L-ANPC) full-bridge inverter is proposed. The proposed inverter is constructed by combining a 2-SiC hybrid 3L-ANPC half-bridge inverter and a two-level half-bridge arm. The operation principle of the proposed inverter by using the conventional modulation scheme is analyzed in detail. Further, a dedicated modulation scheme is proposed to lower the conduction losses. The calculated power losses of the 2-SiC hybrid 5L-ANPC full-bridge inverter with the conventional modulation scheme and the proposed modulation scheme are addressed and compared. The proposed modulation scheme exhibits higher efficiencies under high power conditions. But the conventional modulation scheme shows efficiency superiority under low power conditions. Therefore, a hybrid modulation scheme is also proposed to achieve an overall high efficiency performance. A 4 kW prototype is built to evaluate the proposed topology and its modulation scheme at conversion efficiency. Experimental results and analysis show that comparing to the conventional modulation scheme, the hybrid modulation scheme can reduce power loss without increasing the hardware cost.

Neutral-point (NP) voltage imbalance is an inherent issue of three-level converters. The alternating input current distortion is generated by using the conventional discontinuous pulsewidth modulation (DPWM) scheme without NP voltage balance control. In this article, the deviation vector between the synthesis vector and the reference vector, which is the fundamental cause of alternating input current distortion under NP voltage unbalance conditions, is revealed. Then, by optimizing the subsector division and the switching state sequence, a dynamic-space-vector DPWM (DSV-DPWM) is proposed to eliminate the deviation vector. Further, the comparisons of the proposed DSV-DPWM, the conventional DPWM, and an existing triangle carrier-based DPWM (TCB-DPWM), are addressed. Finally, a 10-kW prototype was built to verify the effectiveness of the proposed DSV-DPWM scheme. Experimental results show that, compared with the conventional DPWM scheme and the TCB-DPWM scheme, both the current THD performance and efficiencies can be significantly improved by the proposed DSV-DPWM scheme under unbalanced NP voltage conditions.

Compared with space-vector pulsewidth modulation (SV-PWM) schemes, carrier-based PWM (CB-PWM) schemes feature less digital calculation burden. Unfortunately, since different CB-PWM schemes were not represented by a unified expression and the relationship between the injected zero-sequence components (ZSCs) and the switching-state sequences is not revealed, the CB-PWM has poor flexibility in designing the switching-state sequences. In this article, a unified carrier-based PWM (UCB-PWM) is proposed to unify the expressions of different CB-PWM schemes. The ZSC of the proposed UCB-PWM is classified into a basic ZSC (B-ZSC) and a redundant ZSC (R-ZSC). The B-ZSC is a shared component of all CB-PWM schemes, and the dwelling time of redundant small vectors can be distributed by injecting different R-ZSCs. Also, the neutral-point voltage balance control based on either continuous PWM or discontinuous PWM (DPWM) can be achieved by injecting R-ZSCs. Besides, not only the existing carrier-based DPWM schemes but also new carrier-based DPWM schemes are derived by the proposed UCB-PWM. Finally, experimental results verify the correctness and advantages of the proposed UCB-PWM.

Full grid voltage feedforward (GVF) is an effective strategy to suppress the current distortion caused by grid voltage harmonics. However, for critical conduction mode (CRM) grid-tied inverters, the time-varying parts of its control scheme make it impossible to derive its full GVF strategy from the point of view of the transfer function. Hence, this study first analyzes the physical interpretation of the full GVF of conventional LCL-type grid-tied inverters, and then reveals the role of each term from the perspective of the circuit. Then, a full GVF strategy for CRM grid-tied inverters is proposed. The design guidelines, parameter sensitivity, and application limitations of the proposed scheme are analyzed in detail. Finally, a 1-kW single-phase three-level grid-tied inverter was built. Experimental results show that the proposed full GVF can significantly suppress the current distortion caused by the grid voltage harmonics and lower the current total harmonic distortion value by 55% within the full power range.

Controlling current at critical conduction mode (CRM) is an effective way to achieve zero voltage switching (ZVS) of switches for inverters. However, the higher reverse inductor current and fixed deadtime in fully digital soft-switching control, such as reverse current boundary-based (RCB-based) schemes, lead to higher rms inductor current and higher power losses. Besides, the digital control frequency for CRM-based inverters is not well designed, resulting in the contradiction between high performance and high digital calculation burden. Therefore, this article proposes a fully digital soft-switching control based on the variable off -time and deadtime with an optimized designed digital control frequency. First, the variable off -time and deadtime design guidelines are addressed with the established mathematical model of the CRM-based inverter. Then, the power losses of the inverter with different digital control frequencies and control schemes are quantitatively analyzed and compared. Finally, a 1 kW single-phase three-level neutral-point-clamped grid-tied inverter was built. Experimental results show that the proposed scheme can achieve the ZVS turn- on of switches without additional components, and the maximum efficiency is 98.3%. Compared with the RCB-based scheme, the proposed method achieves higher efficiency with the same hardware cost.

For the hysteresis current-based zero voltage switching (HC-ZVS) inverter with an LCL filter, numerous harmonics will be generated in the grid current if the point of common coupling (PCC) voltage is distorted. However, the existing effective solutions for suppressing current harmonics in LCL inverters exhibit significant drawbacks when applied to HC-ZVS inverters, including the inability to calculate parameters and failure in harmonic rejection. To address this issue, this article proposes a dedicated PCC voltage feedforward scheme to eliminate grid current harmonics of the HC-ZVS grid-tied inverter. It is demonstrated that grid current harmonics caused by the distorted PCC voltage can be significantly suppressed by feeding forward only the derivative term of the PCC voltage to the hysteresis-band reference. The effectiveness of the proposed scheme and the stability of the system are thoroughly analyzed. Finally, a 1-kW single-phase HC-ZVS grid-tied inverter prototype was built, and experiments were conducted to verify the effectiveness and practical value of the proposed scheme.