Li Zhang

Dr. Li Zhang

orcid

Research Focus & Metrics

Academic Career Length

10Years (2017-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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30 December 2019 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
LZLi Zhang
Li Zhang
XLXiutao Lou
Xiutao Lou
Chushan LiChushan Li
Chushan Li
Feng WuFeng Wu
Feng Wu
YGYifan Gu
Yifan Gu
DXDewei Xu
Dewei Xu
A systematic method is proposed to generate 2-SiC and 4-SiC hybrid three-level active neutral-point-clamped (3L-ANPC) inverter topologies from two types of switching cells based on the arrangement of freewheeling paths. The 2-SiC hybrid 3L-APNC inverter and the 4-SiC hybrid 3L-ANPC inverter are analyzed in detail with switching states and modulation strategies given. The power losses are quantitative compared between the 2-SiC hybrid 3L-ANPC inverter and the 4-SiC hybrid 3L-ANPC inverter. The junction operating temperatures of active switches in different hybrid 3L-ANPC inverters are also calculated. A universal prototype for these different Si/SiC hybrid schemes is built to evaluate these topologies at conversion efficiency. Experimental results and analysis show that the 2-SiC hybrid 3L-ANPC inverter has the highest efficiency and the lowest cost. The efficiency of the 4-SiC hybrid 3L-ANPC inverter with modulation strategy I is a litter bit lower than that of 2-SiC hybrid 3L-ANPC inverter. However, it has better thermal balance characteristic. Therefore, with the same specifications and switching device parameters, the maximum output power of 4-SiC hybrid 3L-ANPC inverter with modulation strategy I is almost 1.26 times than that of 2-SiC hybrid 3L-ANPC inverter, which shows significant superiority in high power and high power density applications.

10 May 2017 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
HLHuawu Liu
Huawu Liu
HHHaibing Hu
Haibing Hu
HCHao Chen
Hao Chen
LZLi Zhang
Li Zhang
YXYan Xing
Yan Xing
Selective harmonic extraction plays an important role in power quality assessment, harmonic compensation, and so on. Among the various methods, discrete Fourier transform (DFT)-based algorithms has found wide and popular applications due to advantages like simplicity and excellent selectively filtering properties. However, DFT suffers from disadvantages like slow dynamics and sensitivity to frequency variations. In order to alleviate these drawbacks, an improved and extended DFT—generalized DFT (GDFT) is proposed. It is revealed in this paper that the conventional DFT can be viewed as a comb filter connected in series with complex resonators, and DFT relies on the mechanism of pole-zero cancellation for harmonic extraction. More importantly, the key reason behind the DFT slow transient responses is the large delay introduced by the comb filter. Therefore, this paper proposed to reconfigure the comb filter according to specific harmonic patterns of the input signal for improving the dynamic responses and system flexibility. The proposed GDFT not only maintains the advantages of simplicity and selectively filtering properties but also features fast transients, around 0.3 fundamental cycle for typical applications, which is much shorter than the one-cycle settling time of the conventional DFT. A phase-locked-loop block is also incorporated into the harmonic-detection system to deal with possibly large frequency variations in practical applications. Extensive tests are provided to validate effectiveness of the proposed method.

13 November 2017 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
KSKai Sun
Kai Sun
XLXiang Lin
Xiang Lin
YLYunwei Li
Yunwei Li
YGYucheng Gao
Yucheng Gao
LZLi Zhang
Li Zhang
In high-power applications, parallel-operated T-type three-level pulse width modulation (PWM) rectifiers (T3LPRs) are widely employed to improve the power capacity and system reliability. For parallel-operated T3LPRs, there are two important issues need to be properly addressed: 1) the neutral-point potential (NPP) balancing, and 2) the zero sequence circulating current (ZSCC) between the common ac and dc bus. In this paper, the fluctuation of NPP in a T3LPR and the generative mechanism of ZSCC in parallel-operated T3LPRs are first investigated. The zero sequence voltage (ZSV) difference between the parallel-operated T3LPRs is identified as the main excitation source of the ZSCC problem. Meanwhile, the disconnection of the neutral point and the control effect difference of NPP balancing in each T3LPR also affect the ZSCCs within the parallel-operated T3LPRs. To adjust the ZSV of T3LPRs, the dwell time of the positive small voltage vector in each switching period of the converter, which is usually adjusted to balance the NPP, is also required to be controlled to suppress ZSCC. Therefore, in this paper, to avoid the possible conflict, an improved modulation mechanism is designed to guarantee simultaneous ZSCC suppression and NPP balancing. The neutral points of each T3LPR are connected. Then, by adjusting the dwell time of the positive small voltage vector, the charging time of two dc capacitors is adjusted to balance the NPP, and the ZSV differences between different T3LPRs are adjusted to suppress ZSCCs. To avoid the control effect difference of independent NPP balancing in different T3LPRs, all T3LPRs share the same value marking the difference between two dc capacitor voltages. Thus, a communication with a greatly reduced baud rate requirement is needed for NPP balancing to transfer the difference between the two dc capacitor voltages. Moreover, no extra circuit is needed for ZSCC suppression. These approaches make the proposed improved space vector PWM strategy much more practical and easy to employ. The proposed method is verified with experiments on two 3-kW T3LPR prototypes.

24 August 2018 in IEEE Transactions on Industrial Electronics
Verified
Journal Article
Closed access
JWJiangfeng Wang
Jiangfeng Wang
HWHongfei Wu
Hongfei Wu
TYTianyu Yang
Tianyu Yang
LZLi Zhang
Li Zhang
YXYan Xing
Yan Xing
A bidirectional three-phase DC-AC converter with embedded DC-DC converter for bidirectional storage interface is proposed in this paper. With the help of the embedded DC-DC converter, the voltage of storage battery can vary in a wide range. To minimize the power rating and power losses of the embedded DC-DC converter, a simple carrier-based PWM strategy with zero-sequence injection is proposed. By adopting the proposed PWM strategy, only a small ratio of total power needs to be processed by the embedded DC-DC converter while most of the power is only processed by the three-phase DC-AC stage within single conversion stage. As a result, quasi single-stage power conversion is achieved to improve the conversion efficiency of the overall DC-AC power system. Principles, characteristics and implementations of the proposed three-phase DC-AC converter and its PWM strategy are analyzed in detail. The feasibility and effectiveness of the proposed solutions are verified with experimental results.

10 January 2017 in IEEE Journal of Emerging and Selected Topics in Power Electronics
Verified
Journal Article
Closed access
HWHongfei Wu
Hongfei Wu
SDShun Ding
Shun Ding
KSKai Sun
Kai Sun
LZLi Zhang
Li Zhang
YLYuewei Li
Yuewei Li
YXYan Xing
Yan Xing
A fixed frequency operated bidirectional series-resonant (BSR) converter is proposed for energy storage system in dc microgrid. Simple pulsewidth modulation (PWM) control is applied to the proposed converter to regulate the power flows and achieve the following attractive features: 1) the voltage gain of the converter is only determined by the effective duty cycles of switches and has nothing to do with the amplitude and direction of the transferred power, which is a significant innovation and improvement in comparison with most of the existing resonant converters; 2) theoretically, the normalized voltage gain can be regulated from zero to infinite, which means the proposed BSR converter is a Buck-Boost converter and suitable for wide voltage range applications; 3) the direction of power flow and the operation mode, i.e., the forward or backward mode, can be changed automatically and smoothly with the simple PWM control; and 4) zero-voltage switching turn-on is achieved for all the active switches within the entire operation range. Operation principles, control strategies, characteristics, and design considerations of the proposed BSR are analyzed. A 1.6 kW prototype is built and tested to evaluate the feasibility of the proposed converter.

2 November 2017 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
LZLi Zhang
Li Zhang
KSKai Sun
Kai Sun
YLYunwei Li
Yunwei Li
XLXiaonan Lu
Xiaonan Lu
JZJinquan Zhao
Jinquan Zhao
To enhance the redundancy and reliability for a distributed generation system, a grid-tied photovoltaic (PV) generation system based on series-connected module-integrated inverters (SC-MIIs) is presented in this paper. In the grid-tied SC-MII system, each PV panel is interfaced with an MII with independent maximum power point tracking to harvest maximum solar energy. The outputs of MIIs are at ac line frequency and are connected in series to fulfill the voltage requirement in the utility grid. Since the high step-up power conversion stage in the conventional microinverter is avoided, the grid-tied SC-MII system is easier to implement and features high efficiency. Meanwhile, a distributed control strategy for SC-MIIs is proposed, in which the active power sharing among the MIIs depends on the individual maximum power available from PV panels, while the reactive power of the system can be regulated by any of the MIIs according to the utility grid command. Simulation and experimental results verify the feasibility and effectiveness of the proposed system and its corresponding control strategy.