Convolutional Neural Networks (CNNs) have been incredibly effective for object detection tasks. YOLOv4 is a state-of-the-art object detection algorithm designed for embedded systems. It is based on YOLOv3 and has improved accuracy, speed, and robustness. However, deploying CNNs on embedded systems such as Field Programmable Gate Arrays (FPGAs) is difficult due to their limited resources. To address this issue, FPGA-based CNN architectures have been developed to improve the resource utilization of CNNs, resulting in improved accuracy and speed. This paper examines the use of General Matrix Multiplication Operations (GEMM) to accelerate the execution of YOLOv4 on embedded systems. It reviews the most recent GEMM implementations and evaluates their accuracy and robustness. It also discusses the challenges of deploying YOLOv4 on autonomous vehicle datasets. Finally, the paper presents a case study demonstrating the successful implementation of YOLOv4 on an Intel Arria 10 embedded system using GEMM.

Deploying deep learning-based object detection models like YOLOv4 on resource-constrained embedded ar-chitectures presents several challenges, particularly regarding computing performance, memory usage, and energy consumption. This study examines the quantization of the YOLOv4 model to facilitate real-time inference on lightweight edge devices, focusing on NVIDIA’s Jetson Nano and AGX. We utilize post-training quantization techniques to reduce both model size and computational complexity, all while striving to maintain acceptable detection accuracy. Experimental results indicate that an 8-bit quantized YOLOv4 model can achieve near real-time performance with minimal accuracy loss. This makes it well-suited for embedded applications such as autonomous navigation. Additionally, this research highlights the trade-offs between model compression and detection performance, proposing an optimization method tailored to the hardware constraints of embedded architectures.

The development of SLAM algorithms in the era of autonomous navigation and the growing demand for autonomous robot in place of human being, has put into question how to reduce the computational complexity and make use of these algorithms to operate in real time. Our work aims to take advantage of the high level synthesis (HLS) on FPGAs to design a real time SLAM application. Precisely, we evaluate the promess-held by the new modern low power FPGAs in accelerating SLAM algorithms. Throughtout this, we will attempt to implement a well-known algorithms (FastSLAM2.0), on a new modern FPGA using OpenCL, a standard high level language. Our implementation results show a significant improvement of the algorithm processing time on an FPGA device over a modern powerful embedded GPGPU.