Silicon-rich ${\mathrm{(SR)/SiO}}_{\mathrm{2}}$ multilayered systems were produced by reactive magnetron sputtering, through an approach based on the ability of hydrogen, when alternatively mixed to the argon of the plasma, to reduce the oxygen originated from the ${\mathrm{SiO}}_{\mathrm{2}}$ target. Optimum values of both hydrogen partial pressure (45 mTorr) and deposition temperature $\text{(500\hspace{0.05em}°}\mathrm{C})$ have led to the highest incorporation of Si in the SR layer which crystallizes after annealing. The ${\mathrm{SR/SiO}}_{\mathrm{2}}$ superlattices grown with such conditions showed that the size of the Si nanocrystals is limited by the thickness of the SR layer. Considering the difference observed between the photoluminescence peak position and the predicted band gap for Si nanocrystals, the results suggest that we deal with a quantum-size confinement assisted by a Si–O vibration located at the interface.

Polycrystalline fluorine-doped SnO2 (FTO) thin films have been grown by ultrasonic spray pyrolysis on glass substrate. By varying growth conditions, several FTO specimens have been deposited and the study of their structural, electrical, and optical properties has been carried out. By systematically investigating the mobility as a function of carrier density, grain size, and crystallite size, the contribution of each physical mechanism involved in the electron scattering has been derived. A thorough comparison of experimental data and calculations allows to disentangle these different mechanisms and to deduce their relative importance. In particular, the roles of extended structural defects such as grain or twin boundaries as revealed by electron microscopy or x-ray diffraction along with ionized impurities are discussed. As a consequence, based on the quantitative analysis presented here, an experimental methodology leading to the improvement of the electro-optical properties of FTO thin films is reported. FTO thin films assuming an electrical resistivity as low as 3.7 · 10−4 Ω cm (square sheet resistance of 8 Ω/◻) while retaining good transmittance up to 86% (including substrate effect) in the visible range have been obtained.

Crystalline Si nanowires have been grown using a microelectronics-friendly solid-phase catalyst (PtSi) by chemical vapor deposition. Tapered growth occurs at high deposition temperatures $(>700°\mathrm{C})$ due to uncatalyzed Si deposition at wire sidewalls, but this effect can be reduced at lower $T$ $(<600°\mathrm{C})$ , while still maintaining reasonable growth rates $(1\mu \mathrm{m}∕\mathrm{h})$ . Electrical testing of individual nanowires using conductive atomic force microscopy on as-grown samples demonstrates that wires are conducting with intrinsic resistivities in the $10–50\Omega \mathrm{cm}$ range.