An inductively-powered wireless integrated neural recording and stimulation (WINeRS-8) system-on-a-chip (SoC) that is compatible with the EnerCage-HC2 for wireless/battery- less operation has been presented for neuroscience experiments on freely behaving animals. WINeRS-8 includes a 32-ch recording analog front-end (AFE), a 4-ch current-controlled stimulator, and a 434 MHz on-off keying (OOK) data link to an external software- defined radio (SDR) wideband receiver (Rx). The headstage also has of a Bluetooth Low Energy (BLE) link for controlling the SoC. WINeRS-8/EnerCage-HC2 systems form a bidirectional wireless and battery-less neural interface within a standard homecage, which can support longitudinal experiments in an enriched environment. Both systems were verified in vivo on rat animal model, and the recorded signals were compared with hardwired and battery-powered recording results. Real-time stimulation and recording verified the system's potential for bidirectional neural interfacing within the homecage, while continuously delivering 35 mW to the hybrid WINeRS-8 headstage over an unlimited period.
An energy‐efficient successive approximation register (SAR) analogue‐to‐digital converter (ADC) switching scheme is proposed for low‐power biomedical applications. By dramatically reducing energy consumption in the first three bit‐cycles, the average switching energy of the proposed scheme is reduced by 98.8% compared with the conventional architecture. The number of capacitors in the capacitor array of this proposed scheme is also reduced by 75.5% over the conventional approach.
An energy‐efficient switching scheme for a low‐power successive approximation register (SAR) analogue‐to‐digital converter (ADC) is proposed. Taking the parasitic capacitance of the capacitor array into consideration, the average switching energy of the proposed scheme can be reduced by 97.4% compared with the conventional architecture. The proposed scheme also reduces the number of capacitors in the capacitor array by 75.5% and hence achieves area efficiency with high performance.
13 May 2019 in Circuits, Systems, and Signal Processing