Single LiNbO₃ (LNO) crystals are widely utilized in surface acoustic wave devices, optoelectronic devices, and novel ferroelectric memory devices due to their remarkable electro-optic and piezoelectric properties, and high saturation and remnant polarizations. However, challenges remain regarding their nanofabrication that hinder their applications. The prevailing etching techniques for LNO encompass dry etching, wet etching, and focused-ion-beam etching, each having distinct merits and demerits. Achieving higher etching rates and improved sidewall angles presents a challenge in LNO nanofabrication. Building upon the current etching researches, this study explores various etching methods using instruments capable of generating diverse plasma densities, such as dry etching in reactive ion etching (RIE) and inductively coupled plasma (ICP), proton exchange-enhanced etching, and wet chemical etching following high-temperature reduction treatment, as well as hybrid dry and wet etching. Ultimately, after employing RIE dry etching combined with wet etching, following a high-temperature reduction treatment, an etching rate of 10 nm/min and pretty 90° sidewall angles were achieved. Furthermore, high etching rates of 79 nm/min with steep sidewall angles of 83° were obtained using ICP dry etching. Additionally, using SiO₂ masks, a high etching rate of 108 nm/min and an etching selectivity ratio of 0.86:1 were achieved. Distinct etching conditions yielded diverse yet exceptional results, providing multiple processing paths of etching for the versatile application of LNO.

Non-volatile memory devices have become crucial components in emerging fields like integrated circuits and quantum computing. However, their cryogenic use remains a challenge today. Here we fabricated ferroelectric domain wall memory devices using an X-cut LiNbO ₃ (LNO) thin film on silicon, and their on/off currents after the creation and erasure of conducting domain walls between two antiparallel/parallel domains were investigated at low temperatures. The readout current is sufficiently larger than 10 μA, though the domain wall current decreases nearly by a half upon cooling of the device from 300 to 120 K. The cryogenic memory has a large on/off ratio (>10 ⁴ ), long retention time (>10 years) and high endurance cycles (>10 ⁹ ), and can be applied at extremely harsh environments.

The ferroelectric diode effect is a promising candidate for resistive memory applications, but the precise role of defects in the current switching mechanism remains unclear. Here, we investigated ferroelectric SrRuO3/BiFeO3/SrRuO3 capacitors and observed strong diode current. The capacitors exhibited preferred polarization orientation toward the bottom electrode in the presence of an imprint field, as evidenced by poor polarization retention of upward polarizations at a bias voltage of 1 V. Interfacial defect-mediated charge injection and trapping enabled by negative voltage poling reduced the built-in field and improved the retention property at the expense of reduced diode current. This phenomenon can be reversed by long-time positive voltage poling, allowing the deeply trapped charges to be expelled out of the trap for the rejuvenation of the diode current. Our study provides experimental evidence that interfacial defects modify the diode current in a manner opposite to that of the switched polarization.