Low Earth orbit missions have become crucial for a variety of applications, from scientific research to commercial purposes. Exposure to ionizing radiation in Low Earth Orbit (LEO) poses a significant risk to both spacecraft and astronauts. In this article, we analyze radiation data obtained from different LEO missions to evaluate the potential of using electronic commercial off-the-shelf (COTS) devices in space missions. This study is focused on the total ionizing dose (TID). Our results demonstrate that COTS technology can effectively provide cost-effective and reliable solutions for space applications. Furthermore, we compare the data obtained from actual missions with computational models and tools, such as SPENVIS, to evaluate the accuracy of these models and enhance radiation exposure prediction. This comparison provides valuable insights into the true radiation environment in space and helps us to better understand the potential of COTS technology in reducing costs and development times by utilizing technology previously used in other areas. In light of the results, we can see that the radiation values observed experimentally in space missions versus the computer simulations used present variations up to a factor of 30 depending on the model used in the analysis.

Satellite on-board systems spend their lives in hostile environments where radiation can cause critical hardware failures. One of the most radiation-sensitive elements is memory. The so-called Single Event Effects (SEEs) can corrupt or even irretrievably damage the cells that store the data and program instructions. When one of these cells is corrupted, the program must not use it again during execution. In order to avoid rebuilding and uploading the code, a memory management unit can be used to transparently relocate the program to an error-free memory region. This paper presents the design and implementation of a memory management unit that allows the dynamic relocation of on-board software. This unit provides a hardware mechanism that allows the automatic relocation of sections of code or data at run-time, only requiring software intervention for initialization and configuration. The unit has been implemented on the LEON architecture, a reference for European Space Agency missions. The proposed solution has been validated using the boot and application software of the instrument control unit of the Energetic Particle Detector of the Solar Orbiter mission as a base. Processor synthesis on different FPGAs has shown resource usage and power consumption similar to that of a conventional memory management unit. The results vary between $\pm$ 1-15% in resource usage and $\pm$ 1-7% in power consumption, depending on the number of inputs assigned to the unit and the FPGA used. When comparing performance, both the proposed and conventional memory management units show the same results.

The Mars Sample Return campaign is an endeavor of unprecedented technological complexity and coordination that attempts to answer fundamental questions about the habitability of Mars by returning the first samples of Martian material to Earth for analysis. The third mission in the campaign consists of the NASA-provided Capture, Containment, and Return System (CCRS) onboard the European Space Agency’s Earth Return Orbiter, which will retrieve the Orbiting Sample (OS) container from its orbit around Mars. Retrieving a passive sample container from a planetary orbit has never been attempted by any spacecraft and requires the development of new technology to succeed in this ambitious task. This paper introduces the high-reliability Capture Sensor Suite (CSS), a novel optical detection system that provides CCRS with the capability to autonomously detect the OS as it is captured. This article will discuss the challenges and requirements for the fault-tolerant design of the CSS.

This paper presents the Goddard RISC-V (GRV) a compact, portable, and highly customizable fault-tolerant 32-bit RISC-V processor, specifically designed for embedded space applications. The design integrates advanced fault-tolerance mechanisms to mitigate arbitrary Single Event Transient (SET) and Single Event Upset (SEU) errors while ensuring data integrity. Importantly, fault tolerance is achieved entirely at the design level, eliminating the need for SEU-hardened semiconductor processes, custom cell libraries, or specialized back-end tools. The implementation prioritizes portability and resource efficiency, enabling compatibility with various FPGA and ASIC technologies. This initiative aims to provide NASA with a suite of portable, modular, and scalable alternatives to proprietary solutions. These solutions are designed for broad adaptability across multiple platforms, such as compact scientific instruments, miniaturized deep-space technologies, CubeSats, control and automation systems, and other applications constrained by low-resource processing environments.