Defect pattern recognition (DPR) of wafer maps is critical for determining the root cause of production defects, which can provide insights for the yield improvement in wafer foundries. During wafer fabrication, several types of defects can be coupled together in a piece of wafer, it is called mixed-type defects DPR. To detect mixed-type defects is much more complicated because the combination of defects may vary a lot, from the type of defects, position, angle, number of defects, etc. Deep learning methods have been a good choice for complex pattern recognition problems. In this paper, we propose a deformable convolutional network (DC-Net) for mixed-type DPR (MDPR) in which several types of defects are coupled together in a piece of wafer. A deformable convolutional unit is designed to selectively sample from mixed defects, then extract high-quality features from wafer maps. A multi-label output layer is improved with a one-hot encoding mechanism, which decomposes extract mixed features into each basic single defect. The experiment results indicate that the proposed DC-Net model outperforms conventional models and other deep learning models. Further results of the interpretable analysis reveal that the proposed DC-Net can accurately pinpoint the defects areas of wafer maps with noise points, which is beneficial for mixed-type DPR problems.

Identification of the defective patterns of the wafer maps can provide insights for the quality control in the semiconductor wafer fabrication systems (SWFSs). In real SWFSs, the collected wafer maps are usually imbalanced from the defective types, which will result in misidentification. In this paper, a novel deep learning model called adaptive balancing generative adversarial network (AdaBalGAN) is proposed for the defective pattern recognition (DPR) of wafer maps with imbalanced data. In addition, a categorical generative adversarial network is improved to generate simulated wafer maps in high fidelity and classify the patterns with high accuracy for all defective categories. Taking consideration of the various learning abilities of the DPR model for different patterns into account, an adaptive generative controller is designed to balance the number of samples of each defective type according to the classification accuracy. The experiment results indicated that the proposed AdaBalGAN model outperforms conventional models with higher accuracy and stability for the DPR of wafer maps. Further results of comparative experiments revealed that the proposed adaptive generative mechanism can enhance and balance the recognition accuracy for all categories in the DPR of wafer maps.

Forecasting short-term cycle time of wafer lots is crucial for production planning and control in the wafer manufacturing. A novel recurrent neural network called bilateral long-short-term memory (bilateral LSTM) is proposed to model a short-term cycle time forecasting (CTF) of each re-entrant period of a wafer lot. First, a two-dimensional architecture is designed to transmit the wafer and layer correlations by using wafer and layer connections. Subsequently, aiming to store various error signals caused by the diverse CT data, a multiply memory structure is presented to extend the capacity of constant error carousel (CEC) in the LSTM model. The experiment results indicate that the proposed model outperforms BPN, SVR, and MLR in the accuracy and stability for the short-term CTF. Further comparative experiments reveal that the two-dimensional architecture can enhance the prediction accuracy and the multi-CEC structure can improve the forecasting stability for the short-term CTF of wafer lots.

In order to improve the prompt delivery reliability of the semiconductor wafer fabrication system, a big data analytics (BDA) is designed to predict wafer lots’ cycle time (CT), which is composed by four parts: data acquisition, data pre-processing, data analysing and data prediction. Firstly, the candidate feature set is constructed to collecting all features by analysing the material flow of wafer foundry. Subsequently, a data pre-processing technique is designed to extract, transform and load data from wafer lot transactions data-set. In addition, a conditional mutual information-based feature selection process is proposed to select key feature subset to reduce the dimension of data-set through data analysing without pre-knowledge. To handle the large volumes of data, a concurrent forecasting model is designed to predict the CT of wafer lots in parallel as well. According to the numerical analysis, the predict accuracy of the presented BDA improves clearly with the increase in data size. And, in the large-scale data-set, the BDA has higher accuracy than linear regression and back-propagation network in CT forecasting.

At present, realizing high-quality automatic welding through online monitoring is a research focus in engineering applications. In this paper, a CNN–LSTM algorithm is proposed, which combines the advantages of convolutional neural networks (CNNs) and long short-term memory networks (LSTMs). The CNN–LSTM algorithm establishes a shallow CNN to extract the primary features of the molten pool image. Then the feature tensor extracted by the CNN is transformed into the feature matrix. Finally, the rows of the feature matrix are fed into the LSTM network for feature fusion. This process realizes the implicit mapping from molten pool images to welding defects. The test results on the self-made molten pool image dataset show that CNN contributes to the overall feasibility of the CNN–LSTM algorithm and LSTM network is the most superior in the feature hybrid stage. The algorithm converges at 300 epochs and the accuracy of defects detection in CO₂ welding molten pool is 94%. The processing time of a single image is 0.067 ms, which fully meets the real-time monitoring requirement based on molten pool image. The experimental results on the MNIST and FashionMNIST datasets show that the algorithm is universal and can be used for similar image recognition and classification tasks.