The combined use of Through Silicon Via (TSV) and metal lines, referred to as TSV-metal lines, is an essential structure in three-dimensional integrated circuits. In-depth research into the electromigration failure mechanism of TSV and the microstructure evolution can serve as theoretical guidance for optimizing three-dimensional stacking. This article conducted electromigration experiments on TSV-metal line structural samples at current densities of 1.0 × 10⁵ A/cm², 5 × 10⁵ A/cm², and 1 × 10⁶ A/cm². Additionally, Electron Back Scattered Diffraction (EBSD) technology was employed to systematically investigate the microstructural evolution of the TSV-metal line structure profiles before and after the application of electrical testing. The results indicate that the current induces a change in the crystal orientation at the TSV-metal interface (TSV/metal interface) and the bottom metal line. This phenomenon notably depends on the initial angle between the grain orientation and the current flow direction. When the angle between the current direction and the grain orientations [001] and [010] is relatively large, the crystals are more likely to deviate in the direction where the angle between the grain orientation and the current is smaller. This is because, at this point, the current direction is precisely perpendicular to the crystal plane family, where the atomic density is lowest, and the energy required for electron transport is minimal. Therefore, the current readily rotates in the direction of this crystal orientation. Before the electromigration tests, areas with a high level of misorientation were primarily concentrated at the TSV/metal interface and the corners of the TSV-metal line. However, these areas were found to be more prone to developing voids after the tests. It is conjectured that the high misorientation level leads to elevated stress gradients, which are the primary cause of cracking failures in the TSV-metal line. As the current density increases from 5 × 10⁵ A/cm² to 1 × 10⁶ A/cm², the electromigration failure phenomena in the TSV become even more severe.

The cohesive performance and durability of the bonding layer with semiconductor substrates are of paramount importance for realizing the high thermal conductivity capabilities of diamond. Utilizing electron beam evaporation and the room-temperature, low-pressure bonding process, robust adhesion between diamonds and silicon substrates has been achieved through the application of the metal modification layer comprised of Ti/Cu/Ti/Au (5/300/5/50 nm). Characterization with optical microscopy and atomic force microscopy reveals the uniformity and absence of defects on the surface of the deposited layer. Observations through X-ray and scanning acoustic microscopy indicate no discernible bonding defects. Scanning electron microscopy observation and energy-dispersive spectroscopy analysis of the fracture surface show distinct fracture features on the silicon substrate surface, indicating that the bonding strength of the Ti/Cu/Ti/Au metallization layer surpasses that of the base material. Furthermore, the fracture surface exhibits the presence of Cu and trace amounts of Ti, suggesting that the fracture also occurs at the interface between Ti and Cu. Characterization of the metal modification layer using X-ray diffraction reveals significant lattice distortion in the Ti layer, leading to noticeable stress accumulation within the crystalline structure. Thermal–mechanical fatigue simulations of the Ti/Cu/Ti/Au metal modification layer indicate that, owing to the difference in the coefficient of thermal expansion, the stress exerted by the Cu layer on the Ti layer results in the accumulation of fatigue damage within the Ti layer, ultimately leading to a reduction in its strength and eventual failure.