This review investigates the measurement methods employed to assess the geometry and electrical properties of through-silicon vias (TSVs) and examines the reliability issues associated with TSVs in 3D integrated circuits (ICs). Presently, measurements of TSVs primarily focus on their geometry, filling defects, and the integrity of the insulating dielectric liner. Non-destructive measurement techniques for TSV contours and copper fillings have emerged as a significant area of research. This review discusses the non-destructive measurement of contours using high-frequency signal analysis methods, which aid in determining the stress distribution and reliability risks of TSVs. Additionally, a non-destructive thermal detection method is presented for identifying copper fillings in TSVs. This method exploits the distinct external characteristics exhibited by intact and defective TSVs under thermoelectric coupling excitation. The reliability risks associated with TSVs in service primarily arise from copper contamination, thermal fields in 3D-ICs, stress fields, noise coupling between TSVs, and the interactions among multiple physical fields. These reliability risks impose stringent requirements on the design of 3D-ICs featuring TSVs. It is necessary to electrically characterize the influence of copper contamination resulting from the TSV filling process on the reliability of 3D-ICs over time. Furthermore, the assessment of stress distribution in TSVs necessitates a combination of micro-Raman spectroscopy and finite element simulations. To mitigate cross-coupling effects between TSVs, the insertion of a shield between them is proposed. For efficient optimization of shield placement at the chip level, the geometric model of TSV cross-coupling requires continuous refinement for finite element calculations. Numerical simulations based on finite element methods, artificial intelligence, and machine learning have been applied in this field. Nonetheless, comprehensive design tools and methods in this domain are still lacking. Moreover, the increasing integration of 3D-ICs poses challenges to the manufacturing process of TSVs.

Multi-parameter comprehensive sensing, as a data source for measuring and evaluating the physical state of devices, has become an important direction for the development of flexible electronics. In this case, temperature and pressure are the two common physical parameters, which are usually coupled; however, it is significant but challenging to decouple them simultaneously. Herein, a flexible double-parameter sensor is proposed to realize the decoupled measurement of temperature and pressure based on the thermal-resistance effect and piezocapacitive effect, respectively. A PEDOT:PSS/MWCNT serpentine electrode was prepared via the dispensing printing process to measure temperature, while a PVA/H₃PO₄ ionic film dielectric layer was prepared on porous conductive fabric via the electrostatic spinning process to sense pressure. The advantage of the proposed sensor is that the double dielectric layer capacitance for measuring pressure has a relatively large value and is sensitive to pressure, but not temperature, achieving the direct decoupling measurement of pressure and temperature in conventional measurements. The sensor layers were innovatively designed to enable the serpentine electrode for measuring temperature to be used as an electrode in piezocapacitive sensors. Finite element analysis was conducted to compare the sensitivity of the pressure measurement, realizing the optimized sensor configuration of top piezocapacitive layer and bottom thermal-resistance layer. The designed sensor was proven to have an extremely wide measurement range and high sensitivity. In the case of temperature, it could measure the temperature range of 15–80 °C, and the sensitivity below 50 °C was as high as 0.032 °C⁻¹. In the case of pressure, a wide measurement range of 0–600 kPa was demonstrated, with an extremely high sensitivity of 1249.34 kPa⁻¹ for low-pressure measurements below 10 kPa. The above-mentioned excellent performance proves that the proposed flexible sensor has significant potential application for the simultaneous measurement of temperature and pressure.

The grain orientation of Sn-based solder joints on copper pillars under the combined action of electron wind force and temperature gradient greatly affects their electromigration damage. The copper pillars with Sn-1.8Ag lead-free solder on the top was subjected to a current density of 1.5 × 10⁴ A/cm² at 125 °C to study the electromigration behaviors. The grain orientation was characterized by scanning electron microscopy (SEM) equipped with electron backscattered diffraction (EBSD) detector. Metal dissolution and voids formation in the cathode as well as massive intermetallic compounds(IMC) accumulation in the anode were observed after electromigration. Closer examination of solder joints revealed that the Sn grain whose c-axis perpendicular to electric current may have retarded Cu diffusion to anode and IMC accumulation. In addition, the newly formed Cu₆Sn₅ exhibited preferred orientation related to the electric current direction.

The combined use of Through Silicon Via (TSV) and metal lines, referred to as TSV-metal lines, is an essential structure in three-dimensional integrated circuits. In-depth research into the electromigration failure mechanism of TSV and the microstructure evolution can serve as theoretical guidance for optimizing three-dimensional stacking. This article conducted electromigration experiments on TSV-metal line structural samples at current densities of 1.0 × 10⁵ A/cm², 5 × 10⁵ A/cm², and 1 × 10⁶ A/cm². Additionally, Electron Back Scattered Diffraction (EBSD) technology was employed to systematically investigate the microstructural evolution of the TSV-metal line structure profiles before and after the application of electrical testing. The results indicate that the current induces a change in the crystal orientation at the TSV-metal interface (TSV/metal interface) and the bottom metal line. This phenomenon notably depends on the initial angle between the grain orientation and the current flow direction. When the angle between the current direction and the grain orientations [001] and [010] is relatively large, the crystals are more likely to deviate in the direction where the angle between the grain orientation and the current is smaller. This is because, at this point, the current direction is precisely perpendicular to the crystal plane family, where the atomic density is lowest, and the energy required for electron transport is minimal. Therefore, the current readily rotates in the direction of this crystal orientation. Before the electromigration tests, areas with a high level of misorientation were primarily concentrated at the TSV/metal interface and the corners of the TSV-metal line. However, these areas were found to be more prone to developing voids after the tests. It is conjectured that the high misorientation level leads to elevated stress gradients, which are the primary cause of cracking failures in the TSV-metal line. As the current density increases from 5 × 10⁵ A/cm² to 1 × 10⁶ A/cm², the electromigration failure phenomena in the TSV become even more severe.

Through glass via (TGV) has emerged as a critical solution for next-generation packaging platforms owing to its low dielectric loss, superior coefficient of thermal expansion (CTE) compatibility. Previous studies shows that low thermal conductivity of TGV could lead to thermo-mechanical failures. However, current research on failure behavior of TGV induced by thermal stress structures remains relatively limited. This paper investigates the effects of annealing conditions on residual stress distribution and Cu protrusion behavior in TGV. The evolution of residual stress in top surface of glass substrates under different annealing temperatures and annealing periods was analyzed by nanoindentation, and the corresponding morphological changes of Cu protrusions were characterized by atomic force microscopy (AFM). It is found that annealing helps reduce residual stress on the glass substrate, but prolonged annealing can lead to the generation of residual tensile stress, thereby causing glass cracking; Cu protrusion height increases with annealing period but shows a decreasing growth rate. A creep rate model is established, achieving a RMSE of 1.143 for TGV creep behavior. A quantitative correlation model for the liner relationship residual stress and the Cu protrusion height is proposed. These results provide theoretical guidance for TGV reliability assessment and thermal optimization design.

Ni-based superalloys are widely used to manufacture gas turbine core components, but reports on the reliability of superalloys at cryogenic temperatures are still limited. Considering the actual application of superalloys in the field of cryogenic temperature, the tensile deformation behavior of directionally solidified superalloy DZ406 was investigated at cryogenic temperatures from −125 °C to 25 °C, and the comparative analysis of room temperature and 1000 °C was carried out. The yield strength and ultimate strength at cryogenic temperatures were close to that at room temperature, and twice that at 1000 °C. The elongation was maintained at 10–15% and exhibited a certain plasticity at cryogenic temperatures. The morphologies and chemical composition of γ′ precipitates were close at cryogenic temperatures, room temperature and 1000 °C. The microstructure difference that was caused by different temperatures was mainly reflected in the fracture mode and dislocation configuration. At cryogenic temperature, the fracture samples basically exhibited no necking phenomenon, and the cracks were basically located in the interdendritic regions and occurred in MC carbide itself; at room temperature and 1000 °C, dimples with carbides inside were distributed on the fracture surface. Slip bands and dislocations contributed to the tensile deformation at cryogenic temperatures and room temperature, while only the dislocations worked at 1000 °C.