An Extended Superjunction (SJ) Gate (ESG) Lateral Double-diffused Metal–Oxide Semiconductor (LDMOS) with full bulk electron accumulation in the drift is proposed, and the physical mechanism is investigated by the SENTAURUS. It features a Fin Gate including Planar Gate (PG) and ESG: the ESG is formed by the P-Pillar and two integrated back-to-back diodes $\text{D}_{{2}}$ and $\text{D}_{{1}}$ , then the gate potential ${V}_{\text {GS}}$ is extended through the whole P-Pillar. Additionally, the gate oxide ${W}_{\text {oxide}}$ is inserted between the P- and N-Pillars of the SJ. At the ON-state, the 3-D electron channels are produced at the P-well by the Fin Gate, and the extra bulk accumulation effect is induced at the sidewalls of the N-Pillar by the positive ${V}_{\text {GS}}$ of the ESG, which can significantly decrease the ${R}_{\mathrm{\scriptstyle {ON, SP}}}$ . At the OFF-state, the N- and P-Pillars deplete from each other through the gate oxide ${W}_{\text {oxide}}$ like the conventional SJ. The 3-D simulation results show that the BV and ${R}_{\mathrm{\scriptstyle {ON, SP}}}$ are 171 V and 0.49 $\text{m}\Omega \cdot \text {cm}^{{2}}$ , respectively. The FOM is high up to 59.6 MW/cm ² , which breaks through the silicon limit of the RESURF.

A novel LDMOS featuring bulk full gate (BFG) with bulk channel and electron accumulation effect, named BFG-LDMOS, is proposed and investigated. The BFG includes bulk gate oxide (BGO) that is inserted in the ${N}$ -drift and the full gate (FG) that is formed by the wide open base transistor (P-body/ ${N}$ -drift/P ⁺ ). The gate potential is extended in the gate- ${N}$ -drift-drain (GND) region, and thus, the bulk channel of the P-body and electron accumulation effect of the ${N}$ -drift in the source- ${N}$ -drift-drain (SND) region is achieved, which significantly reduces the specific ON-resistance ( ${R}_{\text {ON,sp}}$ ). In addition, the P-body, ${N}$ -drift, and N ⁺ drain are divided by the BGO, and the P-body/ ${N}$ -drift junction (PN1) sustains the breakdown electric field for both sides, which guarantees the breakdown voltage (BV) like conventional LDMOS. The 3-D simulation results indicate that the BV and ${R}_{\text {ON,sp}}$ are 249 V and 2.93 $\text{m}\Omega \cdot $ cm ² for the proposed BFG-LDMOS, respectively, and the Baliga’s figure of merit (FoM) is high up to 21 MW/cm ² , which breaks through the silicon limit of the reduced surface field (RESURF).

A novel 4H-SiC merged P–I–N Schottky (MPS) with floating back-to-back diode (FBD), named FBD-MPS, is proposed and investigated by the Sentaurus technology computer-aided design (TCAD) and analytical model. The FBD features a trench oxide and floating P-shield, which is inserted between the P+/N– (PN) junction and Schottky junction to eliminate the shorted anode effect. The FBD is formed by the N-drift/P-shield/N-drift and it separates the PN and Schottky active region independently. The FBD reduces not only the V _turn to suppress the snapback effect but also the V _on at bipolar operation. The results show that the snapback can be completely eliminated, and the maximum electric field (E _max) is shifted from the Schottky junction to the FBD in the breakdown state.

In this paper, a novel snapback-free reverse-conducting lateral insulated-gate bipolar transistor with embedded MOS controlled diode is proposed and investigated by the numerical TCAD Simulation. The proposed reverse conducting LIGBT features an embedded MOS controlled diode which provides reverse conduction path when the gate voltage of MOS controlled diode is greater than those of threshold voltage. The collector and floating ohmic contact are shorted by the PN junction above the MOS controlled diode gate oxide layer, which provides a current path for carriers in the forward-conducting and turn off modes. Compared with the Separated Shorted-Anode LIGBT (SSA LIGBT), the snapback voltage (ΔV SB) of the proposed LIGBT is not only completely eliminated, but also decreases collector size. The simulation shows that the turnoff loss of the proposed LIGBT, under the same forward voltage drop (V on ~1.38 V), reduces 66.4% and 44.2% for the SSA LIGBT and conventional LIGBT (CON LIGBT), respectively. In addition, the short-circuit withstand and reverse recovery capabilities are obviously improved by the MOS controlled diode.