With the rapid development of semiconductor technology, traditional equation-based modeling faces challenges in accuracy and development time. To overcome these limitations, neural network (NN)-based modeling methods have been proposed. However, the NN-based compact model encounters two major issues. Firstly, it exhibits unphysical behaviors such as un-smoothness and non-monotonicity, which hinder its practical use. Secondly, finding an appropriate NN structure with high accuracy requires expertise and is time-consuming. In this paper, we propose an Automatic Physical-Informed Neural Network (AutoPINN) generation framework to solve these challenges. The framework consists of two parts: the Physics-Informed Neural Network (PINN) and the two-step Automatic Neural Network (AutoNN). The PINN is introduced to resolve unphysical issues by incorporating physical information. The AutoNN assists the PINN in automatically determining an optimal structure without human involvement. We evaluate the proposed AutoPINN framework on the gate-all-around transistor device. The results demonstrate that AutoPINN achieves an error of less than 0.05%. The generalization of our NN is promising, as validated by the test error and the loss landscape. The results demonstrate smoothness in high-order derivatives, and the monotonicity can be well-preserved. We believe that this work has the potential to accelerate the development and simulation process of emerging devices.

With the CMOS technology downscaling to the deep nanoscale, the aging effects of devices degrade circuit performance and even lead to functional failure. The stress analysis is critical to evaluate the influence of aging effects on digital circuits. Some related analytical work has recently focused on reliability-aware circuit analysis. Nevertheless, the aging dependence among different devices is not considered, which will induce errors of degradation evaluation in the digital circuit. In order to improve the accuracy of reliability-aware static timing analysis, an improved analytical method is proposed by employing logical resolving. Experimental results show that the proposed method has a better evaluation accuracy of aging path delay than traditional strategies. For aging timing evaluation on aging paths, excessive pessimism can be reduced by employing the proposed method. And, a 378× speedup is achieved while having a 0.56% relative error compared with precise SPICE simulation. Moreover, the circuit performance sacrifice of an aging-aware synthesis flow with the proposed method can be decreased. Due to the high efficiency and high accuracy, the proposed method can meet the speed demands of large-scale digital circuit reliability analysis while achieving transistor simulation accuracy.

Transistor aging significantly affects digital circuit performance, the development of aging-aware standard cell libraries for reliability analysis is essential. Machine learning-based methods have shown promise in efficient library characterization. However, existing methods neither investigate the unlabeled samples nor consider the similarity between timing arcs within the standard cell. In this paper, a semi-supervised transfer learning framework is proposed, which leverages unlabeled samples and correlated timing arcs to enhance the efficiency of aging-aware library characterization. Experimental results demonstrate a 22% reduction in training data compared to the state-of-the-art method while achieving improved prediction accuracy. The proposed framework is evaluated on a RISC-V processor design, demonstrating an average relative error of 1.04% and 100× speedup in aging-aware static timing analysis compared to full simulation-based library generation. The proposed framework is generic and can be applied to any underlying model and other characterization library prediction scenarios.

This article proposes a method to generate accurate and concise analytic equations for device compact modeling using Physics-Assisted Kolmogorov–Arnold Networks (PKAN). The equations are directly extracted from the trained neural network architecture. PKAN uses variable activation functions informed by prior physical knowledge to model device behaviors. Similarity constraints map these trained activation functions to mathematical symbols. Sparsification techniques simplify the network structure, producing concise and explicit equations. This article also presents four approaches for physics-assisted device modeling using PKAN: (1) generating entire continuous equations without human intervention, (2) applying correlation factors to existing models without requiring knowledge of internal physical mechanisms, (3) revising specific parts of existing models, and (4) automatically extending existing models. Experimental results show that PKAN demonstrates significant accuracy improvements, achieving error reductions of 91.8%, 91.5%, 66.2%, and 83.7% for corresponding experiments, respectively. These findings demonstrate PKAN’s potential for various device modeling applications. By combining the precision of neural networks with the clarity of symbolic representation, PKAN offers a powerful tool for device modeling applications.