Clique-based neural networks implement low-complexity functions working with a reduced connectivity between neurons. Thus, they address very specific applications operating with a very low-energy budget. However, the implementation in the state of the art is not flexible and a fabricated circuit is only usable in a unique use case. Besides, the silicon area of hardwired circuits grows exponentially with the number of implemented neurons that is prohibitive for embedded applications. This paper proposes a flexible and iterative neural architecture capable of implementing multiple types of clique-based neural networks of up to 3968 neurons. The circuit has been integrated in an ST 65-nm CMOS ASIC and occupies a 0.21-mm² silicon surface area. The proper functioning of the circuit is illustrated using two application cases: a keyword recovery application and an electrocardiogram classification. The neurons outputs are updated 83 ns after a stimulation, and a neuron needs an energy of 115 fJ to propagate a change at the input to its output.

To operate under severe energy constraints, clique-based neural networks are good candidates. They benefit from a reduced exchange of information between low-complexity processing units with no performance degradation. This paper proposes a modular, flexible and scalable architecture validated by an ST 65-nm CMOS ASIC implementation for a 30-neuron clique-based neural network circuit. With 0.8V power supply, 150nA unitary current and a low performance degradation, the neuron energy consumption is reduced to only 7fJ per synaptic event. The network occupies a 41,820μm2 silicon area.

Analog-to-feature (A2F) conversion based on non-uniform wavelet sampling (NUWS) has demonstrated the ability to reduce energy consumption in wireless sensors while employed for electrocardiogram (ECG) anomaly detection. The technique involves extracting only relevant features for a given task directly from analog signals and conducting classification in the digital domain. Building on this approach, we extended the application of the proposed generic A2F converter to address a human activity recognition (HAR) task. The performed simulations include the training and evaluation of neural network (NN) classifiers built for each application. The corresponding results enabled the definition of valuable features and the hardware specifications for the ongoing complete circuit design. One of the principal elements constituting the developed converter, the integrator brought from the state-of-the-art design, was modified and simulated at the circuit level to meet our requirements. The revised value of its power consumption served to estimate the energy spent by the communication chain with the A2F converter. It consumes at least 20 and 5 times less than the chain employing the Nyquist approach in arrhythmia detection and HAR tasks, respectively. This fact highlights the potential of A2F conversion with NUWS in achieving flexible and energy-efficient sensor systems for diverse applications.

Clique-based neural networks implement low-complexity functions working with a reduced connectivity between neurons. Thus, they address very specific applications operating with a very low energy budget. This paper proposes a flexible and iterative neural architecture able to implement multiple types of clique-based neural networks of up to 3968 neurons. The circuit has been integrated in a ST 65-nm CMOS ASIC and validated in the context of ECG classification. The network core reacts in 83ns to a stimulation and occupies a 0.21mm ² silicon area.

Les réseaux de capteurs corporels représentent un enjeu sociétal important en permettant des soins de meilleure qualité avec un coût réduit. Ces derniers sont utilisés pour détecter des anomalies dès leur apparition et ainsi intervenir au plus vite. Les capteurs sont soumis à de nombreuses contraintes de fiabilité, robustesse, taille et consommation. Dans cette thèse, les différentes opérations réalisées par les réseaux de capteurs corporels sont analysées. La consommation de chacune d'elles est évaluée afin de guider les axes de recherche pour améliorer l'autonomie énergétique des capteurs. Un capteur pour la détection d'arythmie sur des signaux cardiaques est proposé. Il intègre un traitement du signal via l'utilisation d'un réseau de neurone à cliques. Le système proposé est simulé et offre une exactitude de classification de 95 % pour la détection de trois types d'arythmie. Le prototypage du système via la fabrication d'un circuit mixte analogique/numérique en CMOS 65 nm montre une consommation du capteur de l'ordre de 1,4 μJ. Pour réduire encore plus l'énergie, une nouvelle méthode d'acquisition est utilisée. Une architecture de convertisseur est proposée pour l'acquisition et le traitement de signaux cardiaques. Cette dernière laisse espérer une consommation de l'ordre de 1,18 nJ pour acquérir les paramètres tout en offrant une exactitude de classification proche de 98 %. Cette étude permet d'ouvrir la voie vers la mise en place de capteurs très basse consommation pouvant durer toute une vie avec une simple pile.