Leadless Cardiac Pacemakers (LCP) have the potential to revolutionize Cardiac Rhythm Management (CRM). Current LCPs can only pace a single location of the heart limiting their use to patients requiring single-chamber stimulation. A Multi-node system of synchronized LCPs could be used in a significantly larger patient population. Synchronization using standard communication techniques involves high power consumption decreasing the longevity of the device. In this work, we investigate Galvanic Intra Body Communication (IBC) as a method to synchronize multi-node LCP systems. First, an accurate computational torso model was used for quasi-static simulations to estimate channel pathloss in the frequency range [40 kHz-20 MHz]. The model was then verified with in-vivo measurements using a novel experimental setup, where two LCP devices were placed in the right atrium, right ventricle and left ventricle. All channels involved in a potential multi-node LCP system were characterized. The orientation of the transducers relative to each other had a great impact on the results, with the attenuation level ranging between 55 dB and 70 dB between the best and worst orientations. The best results were achieved in the MHz range. Coupled with the fact that it does not require additional electrodes, this study suggests Galvanic IBC be superior to conventional communication methods for LCP devices. This analysis defines a methodology for galvanic IBC channel characterization for LCP systems, which is an important step for the design of efficient transceivers for IBC applications. More experiments with larger datasets are needed to bring this method to practice.

This paper proposes a fully digital calibration of timing mismatch for undersampling Time Interleaved Analog-to-Digital Converter (TI-ADC) employed in Software Defined Radio (SDR) receivers. The proposed calibration scheme employs an ideal differentiator filter, a Hilbert transform filter and a scaling factor to compute the derivative of the input in any Nyquist Band (NB). The efficiency of the proposed technique is shown using a four-channel undersampling 60 dB SNR TI-ADC clocked at 2.7 GHz. Monte Carlo simulations show SNDR and SFDR improvements of respectively, 18 dB and 21 dB over the first three NBs.

In previous work, a non-uniform sampling (NUS) technique to control analog-to-digital conversion (ADC) in a multistandard radio receiver was proposed. In this context of wide band radio signals, the NUS-based ADC offers the advantages of relaxing antialiasing filter (AAF) constraints, decreasing the sampling frequency average and reducing ADC dynamic power consumption. In this paper, we focus on generating non-uniform clock for the sample and hold block of the ADC. The proposed non-uniform clock is based on quantified clock timing. Non-uniform clock is generated from digital control unit (DCU). The DCU is composed of a Gray counter, a linear feedback shift register (LFSR) and a multiplexer to generate specified signals and to select the required clock phase. Simulation results show that performances are similar for conventional uniform sampling (US), additive random sampling (ARS) and time quantized additive random sampling (TQ-RS) for different quantizing factors.

In this work, a new combiner analysis method for the design of Doherty Power Amplifiers (DPA) is proposed. A compact L-C combiner is used to validate the proposed method through both simulation and realization of a two-stage DPA in a 130nm RF-SOI process. Using a 2.3GHz CW signal, the PA achieves a measured peak PAE of 51% at 32dBm output power under 3.4V supply voltage. From 2.1GHz to 2.5GHz, the PA shows an average output power and PAE higher than 26.9dBm and 39% respectively at -35dBc E-UTRA ACLR when using a 10MHz-50RB QPSK LTE uplink signal with memoryless DPD. At 2.3GHz, the PA achieves a linear Pout and PAE of 28.85dBm and 42.8% respectively.

This paper studies a post-distortion correction technique applied to a nonlinear receiver. The employed technique relies on the assumption that the input signal is bandlimited and uses the signal spreading in the free energy band in order to perform the estimation. The study focuses on three points: the input distortion level impact, filter complexity and quantization. A good sizing of these key parameters is mandatory in order to have an optimized CMOS implementation.