Hyun Chul Sagong

Dr. Hyun Chul Sagong

orcid

Research Focus & Metrics

Academic Career Length

18Years (2009-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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1 April 2015
Verified
Conference Paper
Closed access
CLChangze Liu
Changze Liu
HSHyun Chul Sagong
Hyun Chul Sagong
HKHyejin Kim
Hyejin Kim
SCSeungjin Choo
Seungjin Choo
HLHyunwoo Lee
Hyunwoo Lee
JPJongwoo Park
Jongwoo Park
In this paper, fundamental reliability findings in 14nm bulk FinFET technology, are systematically investigated. From device and Ring Oscillator stress to product-level HTOL results, we show that BTI on (110) Fin can be improved significantly with optimized process. In addition, BTI variability with small Fins does not pose any fundamental risk and we'll show 1000hrs of HTOL data on 128Mb SRAM. Fin Self-heating effect (SHE) was characterized for both logic and I/O devices and verified through simulations and thermal imaging for product design and verifications. Overall, robust 14nm FinFET reliability has been demonstrated on the product level through full process optimizations and stress validations.

12 December 2020
Verified
Conference Paper
Closed access
KCKihyun Choi
Kihyun Choi
HSHyun Chul Sagong
Hyun Chul Sagong
MJMinjung Jin
Minjung Jin
JHJiang Hai
Jiang Hai
MLMiji Lee
Miji Lee
ELEuncheol Lee
Euncheol Lee
During the past decades, FinFET has been the main device architecture to accelerate transistor performance. Since FinFET should be scaled down with multi-function replace metal gate (RMG) and narrow and taller fin shape, the reliability issues have been concerned as well. It is very important to address the current reliability consideration on evolutionary FinFET and would be helpful to consider the new device architecture like gate all around device beyond FinFET. The baseline reliability on gate dielectric TDDB and BTI is less impacted by work-function modulation for scaled FinFET. In order to meet the wide range of Vt, the additional dipole is utilized resulting in TDDB improvement. The self-heating effect (SHE) should be considered for the intrinsic reliability with very narrower vertical fin structure. The layout dependent self-heating characterization and its model are presented. The BEOL electro-migration needs to add the transistor level self-heating in the thermal aware EM model. Since MOL and BEOL pitch is aggressive reduced, the intrinsic reliability and extrinsic reliability should be considered at the same time. For the high-volume products, the extrinsic failures should be suppressed below ppm level. Since the physical spacing all across the critical is very close to direct tunneling regime, the TTF based reliability model should be considered with power law for FEOL, MOL and BEOL for FinFET technology and beyond.

13 November 2019 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
KCKihyun Choi
Kihyun Choi
HSHyewon Shim
Hyewon Shim
JPJunekyun Park
Junekyun Park
YCYoungwoo Cho
Youngwoo Cho
HRHwasung Rhee
Hwasung Rhee
SLSoonyoung Lee
Soonyoung Lee
In this article, we report the reliability characterization of 7-nm technology, in which the highly scaled sixth generation of FinFETs and 256-Mb static random access memory (SRAM) cells were newly developed by featuring extreme ultraviolet (EUV). The intrinsic reliability mechanisms of 7-nm FinFET including hot carrier injection (HCI), bias temperature instability (BTI), and time-dependent dielectric-breakdown (TDDB) are similar to that of the previous nodes, and would not be degraded by introducing the scaled FinFET. Moreover, we found that the use of EUV single patterning of middle of line (MOL) and back end of line (BEOL) improves reliability distribution remarkably as compared to the previous nodes using argon fluoride (ArF) multiple patterning techniques. We successfully demonstrated SRAM and logic high-temperature operating life (HTOL) up to 500 h, indicating the robustness of product-level reliability. These findings strongly suggest that the 7-nm technology featuring EUV is fully ready for high-volume manufacturing as well as providing a near future logic production with high-quality reliability.

2 September 2024 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
JPJounghun Park
Jounghun Park
GYGilsang Yoon
Gilsang Yoon
DGDonghyun Go
Donghyun Go
DKDonghwi Kim
Donghwi Kim
HSHyun Chul Sagong
Hyun Chul Sagong
Jeong-Soo LeeJeong-Soo Lee
Jeong-Soo Lee
Decompositions of charge loss mechanisms in 3-D NAND flash memory with two different cell structures have been performed using high-temperature retention characteristics. It calculates emission rates of trap-to-band tunneling (TB) and band-to-trap tunneling (BT) to determine the dominant tunneling mechanisms. The lateral migration (LM) component is separated into the LM of holes (LMH) and electrons (LME) using the technology-computer-aided design (TCAD) simulation. The thicker blocking layer could lead to decreased vertical charge loss, and the shorter spacer could enhance the LM components.

2 February 2024 in Sensors
Verified
Journal Article
Open access
PDF file
HSHyun Chul Sagong
Hyun Chul Sagong
SJSeongcheol Jeong
Seongcheol Jeong
HLHojoon Lee
Hojoon Lee
Hydrogen fuel cell vehicles have gained more attention as future automobiles due to their environmental benefits and extended driving ranges. Concurrently, the global hydrogen sensor market is also experiencing substantial growth. These sensors are integrated into vehicles to detect hydrogen leakage and concentration, thereby ensuring the safety of hydrogen fuel cell vehicles. In particular, hydrogen pressure sensors, commonly installed on the manifold and regulator of vehicles, can measure hydrogen pressure and diagnose safety concerns caused by hydrogen leakage in advance. In this paper, we identify the vulnerable points of hydrogen pressure sensors when exposed to vehicle driving environments, investigate failure mechanisms, and provide process optimization techniques. Specifically, our reliability modeling verifies that the components of a printed circuit board (PCB) exposed to humid environments undergo corrosion due to ion migration, leading to the generation of extrinsic series or parallel resistances, which in turn cause fluctuations of output voltage. Through structural and elemental analysis, we pinpoint process-related factors that make components vulnerable to humidity, thereby suggesting recommendations for enhancing the manufacturing process. Based on this analysis in the development stage, we can proactively address and improve reliability and further safety-related issues for future automobiles, thus preventing real field issues.

1 April 2020
Verified
Conference Paper
Closed access
HSHyun Chul Sagong
Hyun Chul Sagong
KCKihyun Choi
Kihyun Choi
HJHai Jiang
Hai Jiang
JPJunekyun Park
Junekyun Park
HRHwasung Rhee
Hwasung Rhee
SPSangwoo Pae
Sangwoo Pae
In this paper, we report the extensive reliability characterization and modeling of multiple FinFET technology generations. Comprehensive study on intrinsic reliability of the FinFET such as hot carrier injection (HCI), bias temperature instability (BTI), and time-dependent dielectric breakdown (TDDB) is introduced. With taller and narrower Fin shape for higher performance, the increased FinFET self-heating (FSH) and its reliability impact are characterized and modeled. The localized layout related reliability on FinFET is also experimentally investigated to provide insights for understanding of local layout effect (LLE). The reliability optimization with Far-BEOL forming gas anneal to passivate the dangling bonds and improve dielectric integrity is analyzed by accounting for the effects of anneals using various gas sources (including high/normal pressure D 2 , H 2 , and N 2 ). FinFET product HTOL data demonstrates reliability exceeding 10 years of life.