In this work, fully vertical GaN trench MOSFETs were fabricated and characterized to evaluate their electrical performances. Transistors show a normally-OFF behavior with a high I_ON/I_OFF (~10⁹) ratio and a significantly small gate leakage current (10⁻¹¹ A/mm). Thanks to an improved resistance partitioning method, the resistances of the trench bottom and trench channel were extracted accurately by taking into account different charging conditions. This methodology enabled an estimation of the effective channel and bottom mobility of 11.1 cm²/V·s and 15.1 cm²/V·s, respectively.

This work presents a comprehensive study of GaN-on-Si pseudo-vertical MOSFETs focusing on single-trench and multi-trench designs. Thanks to a gate-first process flow based on an Al₂O₃/TiN MOS stack, both fabricated devices exhibit promising transistor behavior, with steady normally OFF operation, very low gate leakage current, and good switching performance. Following the extraction of a low effective channel mobility, the frequency dependence of gate-to-source C–V characteristics is studied. In addition, using TCAD Sentaurus Synopsys simulations, the impact of positive fixed charge and donor-type defects at the p-GaN/dielectric interface is investigated, together with the frequency dependency. Finally, by comparing experimental and simulated results, a mechanism is proposed linking the observed threshold voltage shift to the presence of sharp trench-bottom micro-trenching. This mechanism may further explain the origin of the additional C–V hump observed at high frequencies, which could arise from charge trapping at the p-GaN/dielectric interface or from charge inversion in the p-GaN region.