After more than five decades, Moore’s Law for transistors is approaching the end of the international technology roadmap of semiconductors (ITRS). The fate of complementary metal oxide semiconductor (CMOS) architecture has become increasingly unknown. In this era, 3D transistors in the form of gate-all-around (GAA) transistors are being considered as an excellent solution to scaling down beyond the 5 nm technology node, which solves the difficulties of carrier transport in the channel region which are mainly rooted in short channel effects (SCEs). In parallel to Moore, during the last two decades, transistors with a fully depleted SOI (FDSOI) design have also been processed for low-power electronics. Among all the possible designs, there are also tunneling field-effect transistors (TFETs), which offer very low power consumption and decent electrical characteristics. This review article presents new transistor designs, along with the integration of electronics and photonics, simulation methods, and continuation of CMOS process technology to the 5 nm technology node and beyond. The content highlights the innovative methods, challenges, and difficulties in device processing and design, as well as how to apply suitable metrology techniques as a tool to find out the imperfections and lattice distortions, strain status, and composition in the device structures.

Among photodetectors, avalanche photodiodes (APDs) have an important place due to their excellent sensitivity to light. APDs transform photons into electrons and then multiply the electrons, leading to an amplified photocurrent. APDs are promising for faint light detection owing to this outstanding advantage, which will boost LiDAR applications. Although Si APDs have already been commercialized, their spectral region is very limited in many applications. Therefore, it is urgently demanded that the spectral region APDs be extended to the short-wavelength infrared (SWIR) region, which means better atmospheric transmission, a lower solar radiation background, a higher laser eye safety threshold, etc. Up until now, both Ge (GeSn) and InGaAs were employed as the SWIR absorbers. The aim of this review article is to provide a full understanding of Ge(GeSn) and InGaAs for PDs, with a focus on APD operation in the SWIR spectral region, which can be integrated onto the Si platform and is potentially compatible with CMOS technology.

This work demonstrates a high-performance photodetector with a 4-cycle Ge_0.86Si_0.14/Ge multi-quantum well (MQW) structure grown by reduced pressure chemical vapor deposition techniques on a Ge-buffered Si (100) substrate. At −1 V bias, the dark current density of the fabricated PIN mesa devices is as low as 3 mA/cm², and the optical responsivities are 0.51 and 0.17 A/W at 1310 and 1550 nm, respectively, corresponding to the cutoff wavelength of 1620 nm. At the same time, the device has good high-power performance and continuous repeatable light response. On the other hand, the temperature coefficient of resistance (TCR) of the device is as high as −5.18%/K, surpassing all commercial thermal detectors. These results indicate that the CMOS-compatible and low-cost Ge_0.86Si_0.14/Ge multilayer structure is promising for short-wave infrared and uncooled infrared imaging.

In this paper, the ohmic contact resistance, the structure of interface materials and the characteristics of carbon clusters at the 4H-SiC/Ni interface are examined to gain an insight into the formation of ohmic contact between Ni and 4H-SiC of SiC power devices. In this work, the experiment results show that the pulsed laser annealing process can obtain low ohmic contact resistance on 4H-SiC. In addition, the characterization of carbon cluster by Raman spectroscopy is discussed. It is concluded that more carbon vacancies and smaller carbon cluster particle size can be obtained by pulsed laser annealing. The results of this study provide insights into the ohmic contact interface and show that pulsed laser annealing is attractive ohmic contact process for high performance SiC power devices.