A level shifter (LS) appears to be highly efficient and effective in solving voltage contentions between deep sub-threshold and core voltage levels. An input voltage-level driven split-input inverter that can create common unconnected PMOS and NMOS transistors for the input inverter is proposed, which is powered and used at the input stage to achieve maximum conversion efficiency. Layout and simulation results across different corners have demonstrated that the proposed LS is highly useful for cutting-edge nanoscale applications. It can up-convert voltage from 0.2 V to 1.2 V and down-convert from 1.2 V to 0.2 V @ 1 MHz input pulse, with a level-up or level-down mean switching delay of 1.3 ns, and a power of 9.5 nW. Moreover, the LS occupies an area of 8 μm², which is a reasonably compact size compared to the typical LS designs. Overall, the proposed voltage LS design is an efficient and effective solution that could have an ample range of applications in IoT and biomedical, wireless sensor networks.

This study explores integrating renewable energy sources into microgrid systems to improve voltage quality and reduce harmonic distortion losses using an Adaptive Neuro-Fuzzy Inference System (ANFIS) controller. Microgrids with renewables offer enhanced energy reliability and efficiency but face challenges like voltage fluctuations and harmonic distortions. Renewable sources like solar and wind introduce variability, impacting voltage stability and causing harmonic distortions in the grid. The ANFIS controller adapts to these dynamics by dynamically adjusting parameters, leveraging neural network adaptability and fuzzy logic's interpretability to manage nonlinear and uncertain behaviors typical of renewables. The research aims to optimize microgrid performance by mitigating voltage fluctuations and harmonic distortions through ANFIS. By improving operational stability and efficiency, this approach supports effective renewable energy integration into broader grid infrastructures. Through empirical analysis and simulations, the study provides insights into ANFIS's practical application in microgrid management, contributing to sustainable energy solutions and grid resilience.This research underscores the importance of ANFIS controllers in enhancing renewable energy integration within microgrid systems, offering actionable strategies for improving energy sustainability and reliability in modern power networks.

Text to S peech (TTS) algorithms have made tremendous strides in recent years in terms of their ability to generate speech in a single language that sounds as natural as possible. However, because to a lack of available training data, the synthesis of speech from the same person in various languages continues to be difficult. It might be challenging to locate people who are proficient in numerous languages at a level equivalent to native speakers. Voice conversion is one method that may be used to create a polyglot corpus, which can then be used to solve this problem. This entails making use of a voice representation model that has been trained on 53 different languages through the application of hybrid deep learning in order to capture speaker-invariant qualities. In this study, we present a novel approach for the conversion of voices across different languages by employing Generated Adversarial Networks (GANs) to train a multilingual TTS system. The concept of individual likeness loss in order to address the special difficulty of maintaining one's individual speaking identity during the training process can be offered. This work is focused to provide the impression that voice data coming from a variety of languages and speakers was produced by the same individual, and one way to do so is by using this word. In order to determine the extent to which our model is useful, two experiments that compared it against benchmarks that made use of varying degrees of parameter sharing between languages are carried out. The purpose of these experiments was to evaluate the accuracy of pronunciation as well as the caliber of the synthetic voice during transitions between different languages.

Cybersecurity for the Internet of Things (IoT) is a complicated issue in today's networked society. IoT ecosystem security is critical because of the wide range of devices, from industrial sensors to smart thermostats, each with specific vulnerabilities and features. Due to their frequently constrained processing capabilities, these devices are vulnerable to a range of cyberattacks, such as malware insertion, denial of service (DoS), and man-in-the-middle (MitM) assaults. Furthermore, the vast amount of private information that IoT devices ranging from behavioral patterns to personal information underlines how important it is to have effective data privacy safeguards. Ensuring the integrity of the IoT supply chain is another crucial aspect of cybersecurity, as tampering during manufacturing or distribution could compromise the security of devices. Regulatory compliance, such as adherence to standards like GDPR and HIPAA, adds another layer of complexity for manufacturers and service providers.

Energy Efficiency is a critical factor while designing integrated circuits. Therefore, a 1-bit full subtractor (FS) cell is proposed for lower power application by employing Gate Level Body Biasing (GLBB) scheme for Near Threshold Computing (NTC) application to conquer a unique module for achieving full swing borrow output.We evaluate power, delay, energy and the product of energy with delay (EDP) metrics with respect to C-CMOS full subtractor. The proposed feedback based with FS with GLBB technique has a total die area of 60.02 μm², while the average power, delay, and energy are 1138 pW, 242 ns, and 27.53 aJ, respectively. The results revealed that our proposed subthreshold hybrid FS circuit with GLBB scheme successfully achieved more than 10.46% average power consumption, 26.58% energy consumption reductions, and 17.98% EDP savings compared to conventional CMOS configuration and other hybrid counterparts. GLBB circuits with FS achieve performance levels that are not affordable in C-CMOS, DTMOS,and GLBB with full adder configurations. Therefore, the FS circuit serves as an efficient divider circuit in terms of detecting objects for image processing applications.

A crucial component of digital integrated circuits with numerous power domains is the level shifter (LS). The traditional topologies are currently the mirror LS and cross-coupled LS. For full-swing level conversions from extremely low voltage to the nominal voltage of the supply, ahybrid LS is proposed in this paper, which is a combination of the current mirror LS and cross-coupled LS with a swing-aware output inverter. The proposed LS circuit is designed to ensure full swing, static current-free, and limited current-contention level conversions by preserving the benefits of the current mirror and cross-coupled LS, and using them to eliminate each other’s shortcomings. The proposed hybrid LS is designed and implemented by using 45-nm technology in Cadence Virtuoso tool. Pass transistors and current limiters with multiple thresholds are included for the suggested LS. The proposed LS provides voltage conversion from 0.10 V to 1.20 V. At alevel-shifting voltage of 0.20 V, the proposed hybrid LS at 1 MHz input frequency demonstrates a delay of 8.38 ns, an average power consumption of 3.81 µW, and an energy per transition of 26.64 fJ. Additionally, the suggested LS has low delay, good supply voltage scaling, and delay scalability.