In this article, a silicon carbide (SiC) asymmetric MOSFET with a step trench (AST-MOS) is proposed and investigated. The AST-MOS features a step trench with an extra electron current path on one side, thereby increasing the channel density of the device. A thick oxide layer is also employed at the bottom of the step trench, which is used as a new voltage-withstanding region. Furthermore, the ratio of the gate-to-drain capacitance (C_gd) to the gate-to-source capacitance (C_gs) is significantly reduced in the AST-MOS. As a result, the AST-MOS compared with the double-trench MOSFET (DT-MOS) and deep double-trench MOSFET (DDT-MOS), is demonstrated to have an increase of 200 V and 50 V in the breakdown voltage (BV), decreases of 21.8% and 10% in the specific on-resistance (R_on,sp), a reduction of about 1 V in the induced crosstalk voltage, and lower switching loss. Additionally, the trade-off between the resistance of the JFET region (R_JFET) and the electric field in the gate oxide (E_ox) is studied for a step trench and a deep trench. The improved performances suggest that a step trench is a competitive option in advanced device design.

The intrinsic body diode of a silicon carbide (SiC) MOSFET is often utilized as a cost- and area-efficient alternative to an external freewheeling diode. In fast-switching applications, the commutation loop stray inductance has a significant impact on the body diode turn-off behavior, which leads to pronounced surge voltages and oscillations. In this work, by introducing a lightly doped gradient field-stop (LDG-FS) structure, both the dynamic loss and breakdown voltage of the device are improved while maintaining the same on-resistance. Experimental results show that, compared with the conventional step uniformly heavily doped field-stop (HD-FS) structure, the proposed LDG-FS device achieves a 120 V improvement in breakdown voltage. In the same switching circuit, the softness of the body-diode reverse recovery is significantly enhanced, allowing the use of a smaller external gate resistance ( ${R}_{\text {g,ext}}$ ) to achieve faster switching speeds. For comparison, under the same ${R}_{\text {g,ext}}$ , the voltage overshoot is reduced by 19%. Furthermore, when the overshoot voltage is controlled to the same level by adjusting the ${R}_{\text {g,ext}}$ , the turn-on loss ( ${E}_{\text {on}}\text {)}$ of the LDG-FS device is reduced by 31%. These improvements substantially enhance the overall switching efficiency of the SiC MOSFET.