Dr. Chaosong Gao is an Associate Professor at the School of Physics and Science and Technology at Central China Normal University. He received his PhD from Central China Normal University (2016). During his PhD, he studied integrated circuit design at CERN, the European Organization for Nuclear Research, and participated in the design of the pixel detector chip ALPIDE. He is currently mainly engaged in the research and design of ASIC chips for pixel detectors used in large scientific devices, including direct charge collection Topmetal series chips, monolithic active pixel detector MAPS series chips, and photon counting X-ray detector chips. His research area is low-noise and low-power analog integrated circuit design.
Dr. Chaosong Gao is an Associate Professor at the School of Physics and Science and Technology at Central China Normal University. He received his PhD from Central China Normal University (2016). During his PhD, he studied integrated circuit design at CERN, the European Organization for Nuclear Research, and participated in the design of the pixel detector chip ALPIDE. He is currently mainly engaged in the research and design of ASIC chips for pixel detectors used in large scientific devices, including direct charge collection Topmetal series chips, monolithic active pixel detector MAPS series chips, and photon counting X-ray detector chips. His research area is low-noise and low-power analog integrated circuit design.