This paper presents the development of a novel algorithm for continuous wave 24GHz Doppler radar DSP module. The algorithm is based on an accurate vehicle signal extraction by tracking detector, the well-known zero-crossing algorithm for time-frequency signal detection, a relative simple signal filtering and the least squares method (LSM) for the estimation of vehicle velocity, length and radar localization parameters. The simple scattering centre model has been used for the LSM to estimate the listed quantities. The algorithm is estimated as a good platform for the prototyping of more complicated algorithms that can be used for the vehicle shape recognition. For the prototyping of the algorithm the Matlab/Simulink software has been used.

The current work presents a novel digital chaotic communication system with antipodal chaotic shift keying modulation, implemented in a field-programmable gate array (FPGA). Such systems provide high security on the physical communication level and can be used in wireless sensor network systems. A modified Chua circuit chaos generator and error linear feedback chaotic synchronization are implemented in FPGA and used to develop a chaotic communication system with digital transmitter and receiver an analog in-between signal transmission. Additionally, a validated mathematical model of the communication system prototype is created in the Simulink environment, which is used to compare the performance of the prototype and its nodes with the simulation and simplify its development. The performance is evaluated using simulation with the additive white Gaussian noise channel and analyzing the bit error ratio.

This paper presents development and implementation of the Field-Programmable Gate Arrays (FPGA) of a novel Digital Signal Processing (DSP) module for the 24 GHz continuous wave (CW) Doppler radar. The module utilizes the well-known zero-crossing algorithm, relative simple signal filtering, iterative search method and the scattering centers model. The module is constructed to detect vehicles; it estimates its velocity, lane, and shape. Preliminary results of the lane and vehicle length estimation in case of two lanes are provided. VHDL code has been generated and necessary FGPA device resources for basic stages of DSP are estimated. Implementable VDHL code generation of novel algorithm is based on Simulink HDL coder.

During the COVID-19 pandemic, when the educational process was organised remotely, a need arose for inexpensive laboratory equipment that could be given to each student at home. This article describes the development of an affordable and compact laboratory complex allowing laboratory work that is typically performed in an educational institution to be carried out remotely. The proposed device is based on the PIC24FJ128GC006 microcontroller. The purpose of this article is to describe the development of a two-channel USB oscilloscope with the ability to receive an analogue signal having a frequency of up to 500 kHz; a signal generator is also required. The user interface is developed in MATLAB, and a new method for multi-channel signal capture using a single-channel ADC is proposed. Notably, the cost of the device is EUR 24.

This paper deals mainly with the development of prototyping tools for continuous wave 24GHz Doppler radar (DR) DSP modules. The modules are planned to be used for land-based vehicles and they are oriented on the wide range of devices from a simple velocity estimator and a vehicle counter to a vehicle shape recognizer. The prototyping software includes Matlab/Simulink, SolidWorks and Altera Quartus packages, the hardware - DR Front-end, Altera/Terasic FPGA development kits, a PC with sound card and video camera. Self-made software tools are briefly described. These tools have been used for the acquisition of real DR signals, video capturing of vehicle, testing of DR signal processing algorithms, simulation of DR behaviour in the context of urban traffic and comparison of experimental data with simulation results.

This paper deals with the aspects of practical generation of basis function(s) (BF(s)) and the basic notions for orthonormal parametrical transform called as "constant rotation angle in matrix orthonormal transform" (CRAIMOT). The presented CRAIMOT BF generator is implemented as Altera's Cyclone II FPGA. A simplified block diagram and parameters of the generator are provided. The generator has a parallel structure and 5 times shorter sample time in opposite to the previous implementation. The sine/cosine former of BF generator has 3 different versions - CORDIC based, the linear interpolation based, and RAM table based. The comparison of the mentioned versions is provided.