Min Chen

Prof. Dr. Min Chen


Research Focus & Metrics

Academic Career Length

21Years (2006-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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6 March 2006 in IEEE Transactions on Power Electronics
Verified
Journal Article
Open access
MCMin Chen
Min Chen
JSJian Sun
Jian Sun
This paper presents the theory and application of feedforward current control for boost single-phase ac-dc converters with power factor correction. The proposed feedforward signal involves the instantaneous line voltage and the derivative of the reference current. The new control method is compared to existing feedback and feedforward control methods and is shown to significantly reduce input current harmonic distortion, particularly for applications where the current loop crossover frequency is relatively low compared to the line frequency. Implementation of the proposed control using analog devices and the associated issues, such as performance sensitivity to parameter variation and uncertainties, are presented. Analysis results are complemented by numerical simulation and experimental results from a prototype converter. Targeted applications of the proposed method are airborne systems where the line frequency is high, as well as low-cost digital control for terrestrial 50-60-Hz systems where the current loop crossover frequency is limited by the speed of the digital controller.

14 December 2020 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
BLBodong Li
Bodong Li
MCMin Chen
Min Chen
XWXiaoqing Wang
Xiaoqing Wang
NCNing Chen
Ning Chen
XSXinnan Sun
Xinnan Sun
DZDongbo Zhang
Dongbo Zhang
Uncontrolled rectification on the secondary side of the resonant CLLC circuit causes a large amount of conduction loss. Accurate synchronous rectification (SR) can reduce conduction loss by replacing rectifier diodes with MOSFETs' channels exactly. The accuracy of the SR signals depends on the determination of the zero-crossing points of the secondary side resonant current. In this paper, an accurate time-domain model is introduced for the resonant CLLC circuit to obtain these zero-crossing points. This modeling method is more accurate than first harmonic approximation (FHA) and requires less computational effort than ex-tended harmonics approximation (EHA). Compared with previous time-domain modeling methods, the proposed time-domain model gives detailed circuit state expressions and covers the entire circuit operating states. Relying on the accurate circuit model, the SR scheme proposed in this paper can adaptively generate SR signals in different frequency ranges and has the ability to switch modes smoothly. And this method can be used for the later efficiency optimization of CLLC converters that do not originally have SR function, only through the control program update. Moreover, the robustness of the proposed SR method is analyzed, and the proposed concept is verified through a 3kW resonant CLLC prototype.

27 July 2021 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
NCNing Chen
Ning Chen
MCMin Chen
Min Chen
BLBodong Li
Bodong Li
XWXiaoqing Wang
Xiaoqing Wang
XSXinnan Sun
Xinnan Sun
JHJunfei Han
Junfei Han
Synchronous rectification (SR) is an effective method to reduce the secondary side conduction loss of CLLC bidirectional resonant converter and improve its efficiency, but the SR driving signal in CLLC converter is hard to determine. Existing SR signal generating methods can be divided into three categories: theoretical calculation, voltage detection, and current detection. Compared with the other two methods, the current detection method has wider applicability and is insensitive to parasitic parameters, but usually requires lossy, bulky and costly current sensors, increasing the cost and size of the converter. This article proposed a SR scheme based on resonant inductor voltage. The polarity of the resonant current is obtained indirectly through the inductor voltage, thereby avoiding the use of current sensors. To handle the false pulses problem caused by parasitic oscillation, a corresponding SR control strategy is proposed. The SR driving signal is then adjusted according to the delay and transient requirements. Experimental results on a 380V/270V 3kW CLLC converter prototype were presented to verify the effectiveness of the proposed SR method.

19 August 2019 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
JSJing Sheng
Jing Sheng
HYHeya Yang
Heya Yang
CLChushan Li
Chushan Li
MCMin Chen
Min Chen
WLWuhua Li
Wuhua Li
XGXiaowei Gu
Xiaowei Gu
The thermal management plays an important role in improving the reliability and lifetime of high power converters, especially for the high voltage direct current (HVdc) transmission system. In the voltage source converter based HVdc systems (VSC-HVdc), the hybrid modular multilevel converters (MMCs) are taken as the excellent candidates due to their dc short-circuit fault ride-through ability and less submodule (SM) devices. Furthermore, the voltage modulation index of hybrid MMCs can be promoted to achieve higher power rating and efficiency. However, in this article, it is revealed that thermal stress distribution inside the SMs becomes more unbalanced under a high voltage modulation index, which would lead to serious thermal fatigue. To overcome this problem, the active bypass with thyristor for half-bridge submodules (HBSMs) and symmetrical modulation for full-bridge submodules (FBSMs) based active thermal control strategies are employed. With the presented thermal control strategies, the junction temperature of the most stressed devices in both HBSMs and FBSMs is reduced enormously. Besides, the thermal control strategy does not bring negative influence on the steady-state output performance of hybrid MMC. Finally, the theoretical analysis and effectiveness of the proposed control methods are verified based on a laboratorial MMC prototype.

29 April 2019 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
QTQipeng Tang
Qipeng Tang
ASAnwen Shen
Anwen Shen
WLWuhua Li
Wuhua Li
PLPan Luo
Pan Luo
MCMin Chen
Min Chen
HXHe Xiangning
He Xiangning
Three-phase current reconstruction techniques with a single current sensor have been studied for permanent magnet synchronous machines (PMSMs) drive system due to its reducing cost and volume. In order to minimize the current reconstruction dead zone in the conventional method with a single dc-link current sensor, a strategy to couple multiple available positions through the single current sensor is proposed in this paper. With the proposed method, two independent equations of the stator currents can be obtained by sampling the single current sensor twice in both zero voltage vectors and active voltage vectors. By solving these two equations, the phase current reconstruction can be achieved accurately, which moves the current reconstruction dead zone toward six corner area of the space vector hexagon. Meanwhile, in order to guarantee the proposed method suitable in the whole linear modulation region, the suitable selection of the pulsewidth modulation switching period is analyzed in detail. Furthermore, the optimal selections of multiple sampling positions are discussed to lower the actual implementation difficulty of the proposed method. Finally, the experimental results on the PMSM demonstrate that the reconstructed phase currents with the proposed method can be always in consistent with the actual measured currents under different working conditions.

13 August 2020 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
GJGuanlong Jia
Guanlong Jia
MCMin Chen
Min Chen
STSong Tang
Song Tang
CZChenghao Zhang
Chenghao Zhang
GZGuannan Zhu
Guannan Zhu
The usage of too many sizeable capacitors significantly increases the volume and cost of the modular multilevel converter (MMC), and limits its spread in medium- and high-voltage applications. By adding a buck-type active power filter (APF) circuit into a particular MMC topology (of which each phase multiplexes one SM), a modified MMC (APF-M3C) topology, which inherently has the ability to suppress capacitor voltage fluctuations and decrease the power losses compared with conventional MMC topology, is proposed in this paper. Both the SM capacitor voltage ripples, which can be reduced up to 50% of original value and are related to the SM capacitance, and the arm currents, which are related to SM power losses, are calculated in detail. Its topology, and operating principle are presented in detail, and a novel modulation method for the APF-M3C topology are proposed. In addition, an improved control method for the voltage balancing is also recommended to further reduce system cost and power losses. Finally, the APF-M3C topology and traditional MMC simulation and experimental platforms were built. Simulations and experimental results verify the feasibility and effectiveness of the APF-M3C topology and control strategy by comparing with the conventional MMC.