The International Technology Roadmap for Wide-Bandgap Power Semiconductors (ITRW) has four distinct technical working groups, each providing its own perspective on the technology and industrial drivers for the adoption of wide-bandgap (WBG) power semiconductors in power electronics. This article summarizes the progress toward an initial roadmap for the packaging and integration working group of the ITRW.

This paper proposes an approach for the accurate and efficient parameter identification of lithium-ion battery packs using only drive cycle data obtained from hybrid or electric vehicles. The approach was experimentally validated using data collected from a BMW i8 hybrid vehicle. The dual polarization model was used, and a new open circuit voltage equation was proposed based on a simplification of the combined model, with the aim of reducing the number of parameters to be identified. The parameter identification was performed using NEDC data collected on a rolling road dynamometer; the results showed that the proposed model improved the accuracy of terminal voltage estimation, reducing the peak voltage error from 2.16% using the Nernst model to 1.28%. Furthermore, the robustness of these models in maintaining accuracy when new drive cycles were used was evaluated by comparing WLTC simulations with experimental measurements. The proposed model showed improved robustness, with a reduction in RMS error of more than 50% compared to the Nernst model. These findings are significant because they will improve the accuracy of model-based battery management systems used in electric vehicles, allowing for improved performance prediction without the requirement of recharacterization for different drive cycles or individual cell characterization.

Increasing electrification means the world will need 1000 TW-units per year in the next 10 years+. A new generation of wide bandgap power electronics devices are potentially 100-1000 times faster and 100-1000 lower loss than today's technology. Current market projections of massive growth (30%+) for WBG technology and market size into the 10s of $Billions mean that this is a vitally important technology that will shape the next several decades of the world. A key role of the International Technology Roadmap for Wide bandgap Power Semiconductors (ITRW) is to facilitate an acceleration in the R&D process for this new technology to fulfil its potential. This paper takes a holistic view of the future of wide bandgap power electronics, the challenges that needs to be addressed and how roadmaps can make a contribution to meeting these challenges.

Critical issues with current detection systems are their susceptibility to adverse weather conditions and constraint on the vertical field view of the radars limiting the ability of such systems to accurately detect the height of the targets. In this paper, a novel multi-range radar (MRR) arrangement (i.e. triple: long-range, medium-range, and short-range radars) based on the sensor fusion technique is investigated that can detect objects of different sizes in a level 2 advanced driver-assistance system. To improve the accuracy of the detection system, the resilience of the MRR approach is investigated using the Monte Carlo (MC) method for the first time. By adopting MC framework, this study shows that only a handful of fine-scaled computations are required to accurately predict statistics of the radar detection failure, compared to many expensive trials. The results presented huge computational gains for such a complex problem. The MRR approach improved the detection reliability with an increased mean detection distance (4.9% over medium range and 13% over long range radar) and reduced standard deviation over existing methods (30% over medium range and 15% over long-range radar). This will help establishing a new path toward faster and cheaper development of modern vehicle detection systems.

Behavioral synthesis of synchronous systems is a well established and researched area. The transformation of behavioral description into a datapath and control graph, and hence, to a structural realization usually requires three fundamental steps: 1) scheduling (the mapping of behavioral operations onto time slots); 2) allocation (the mapping of the behavioral operations onto abstract functional units); and 3) binding (the mapping of the functional units onto physical cells). Optimization is usually achieved by intelligent manipulation of these three steps in some way. Key to the operation of such a system is the (automatically generated) control graph, which is effectively a complex sequence generator controlling the passage of data through the system in time to some synchronizing clock. The maximum clock speed is dictated by the slowest time slot. (This is the timeslot containing the longest combinational logic delay.) Timeslots containing quicker (less) logic will effectively waste time: the output of the combinational logic in the state will have settled long before the registers reading the data are enabled. If we allow the state to change as soon as the data is ready, by introducing the concepts of "ready" and "acknowledge," the control graph becomes a disjoint set of single-state machines-it effectively disappears, with the consequence that the timeslot-timeslot transitions become self controlling. Having removed the necessity for the timeslots to be of equal duration the system becomes selftiming: asynchronous. This paper describes a behavioral asynchronous synthesis system based on this concept that takes as input an algorithmic description of a design and produces an asynchronous structural implementation. Several example systems are synthesized both synchronously and asynchronously (with no modification to the high level description). In keeping with the well-established observation that asynchronous systems operate at average case time complexity rather than worse case, the asynchronous structures usually operate some 30% faster than their synchronous counterparts, although interesting counterexamples are observed.