This article proposes a highly reliable gate driver circuit based on amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs). The proposed circuit adopted an additional boosted-down structure to maintain the control node (Q-node) of the output TFTs at a low voltage level using the capacitive coupling effect instead of the TFT structure. Consequently, the proposed circuit exhibited stable operation for depletion-mode TFTs with a threshold voltage ( ${V}_{\text {TH}}$ ) of −3 V. The boosted-down structure improved the operation reliability because it reduced the current flow from Q-node to low-level voltage node by removing the continuously degraded TFTs. The drain–source voltage ( ${V}_{\text {DS}}$ ) stress on the TFTs connected to the Q-node was reduced by separating these TFTs from the Q-node during bootstrapping. The ${V}_{\text {DS}}$ value during Q-node bootstrapping was reduced from 44.3 to 27.3 V. A pull-down TFT was designed to operate with a 50% duty ratio to ensure reliability against the bias stress. The output node was discharged by the Q-node discharging TFTs in the next stage during the remaining 50% period. Therefore, the output node was discharged with a total duty ratio of 100%. The proposed circuit operated stably as a shift register with ${V}_{\text {TH}}$ varying from −3 to 9 V. Consequently, using capacitive coupling effect, the proposed circuit exhibited reliable operation with depletion- and enhancement-mode a-IGZO TFTs.

In active-matrix organic light-emitting diode (AMOLED) displays, conventional pixel circuits that compensate for the non-uniformity of the threshold voltage (V_T) of low-temperature polycrystalline silicon thin-film transistors (TFTs) can hardly compensate for variations in other TFT parameters, such as carrier mobility (μ₀), subthreshold swing (SS) and the various effects of parasitic capacitance. In recent high-resolution AMOLED displays, as the current required for OLED pixel driving decreases, the current error rate (CER) caused by the non-uniform TFT parameters increases. In this study, we analyzed the influence of each TFT parameter on the CER using SPICE simulation. Based on our analysis, the origin of the increased CER can be classified into two categories: the charging capability of driving TFT and the capacitive coupling effect of the switching TFT. The SS of the driving TFT and the parasitic capacitance of the switching TFT are major factors that affect the CER in terms of the charging capability and capacitive coupling effect, respectively. Our analysis results can be summarized as follows: The SS value of the driving TFT should be high, and its variation should be small to minimize the CER. The variation in the parasitic capacitance of the switching TFT possibly occurs due to long-term bias conditions, as well as process non-uniformity. Therefore, the stability of TFT should also be confirmed for the prevention of anomalous CER caused by long-term bias stress.

Channel length modulation (CLM) in indium gallium zinc oxide (IGZO) thin film transistors (TFTs) reduces the output resistance (r_o) in the saturation regime. It also degrades current driving accuracy for active matrix organic light emitting diode (AMOLED) backplanes. For top gate, self-aligned devices with nominal channel lengths of 5–15 μm, transmission line method (TLM) analysis yields an effective channel length reduction (ΔL) of about 1.8 μm. This result is consistent with lateral hydrogen redistribution from the self-aligned source/drain (S/D) process. At L = 5 μm, the conventional TFT exhibits r_o = 13.5 ± 2.5 MΩ and an Early voltage (V_A) = 56.1 ± 10.4 V (n = 5). We propose a source connected bottom gate (SCBG) structure that electrostatically stabilizes the pinch-off region and suppresses CLM. The SCBG TFT increases r_o to 475 ± 52 MΩ and V_A to 1159 ± 173 V at L = 5 μm (n = 5), while maintaining normal transfer characteristics. Two-dimensional device simulations reproduce the trend and show that the drain-bias-induced pinch-off shift is reduced, with d(ΔL)/dV_DS decreasing from 0.027 to 0.012 μm/V (about 55%). These results indicate that the SCBG approach is effective for enhancing current saturation in short channel IGZO TFTs for high-resolution AMOLED applications.