Internet of Things (IoT) is an emerging technology and its applications are flattering amidst many users, as it makes everything easier. As a consequence of its massive growth, security and privacy are becoming crucial issues where the IoT devices are perpetually vulnerable to cyber-attacks. To overcome this issue, intrusion detection and mitigation is accomplished which enhances the security in IoT networks. In this paper, we proposed Blockchain entrenched Bi-level intrusion detection and graph based mitigation framework named as HybridChain-IDS. The proposed work embrace four sequential processes includes time-based authentication, user scheduling and access control, bi-level intrusion detection and attack graph generation. Initially, we perform time-based authentication to authenticate the legitimate users using NIK-512 hashing algorithm, password and registered time are stored in Hybridchain which is an assimilation of blockchain and Trusted Execution Environment (TEE) which enhances data privacy and security. After that, we perform user scheduling using Cheetah Optimization Algorithm (COA) which reduces the complexity and then the access control is provided to authorized users by smart contract by considering their trust and permission level. Then, we accomplish bi-level intrusion detection using ResCapsNet which extracts sufficient features and classified effectively. Finally, risk of the attack is evaluated, and then the attacks graphs are generated by employing Enhanced k-nearest neighbor (KNN) algorithm to identify the attack path. Furthermore, the countermeasures are taken based on the attack risk level and the attack graph is stored in Hybridchain for eventual attack prediction. The implementation of this proposed work is directed by network simulator of NS-3.26 and the performance of the proposed HybridChain-IDS is enumerated based on various performance metrics.

Because of the evolution of artificial intelligence (AI), home security has progressed from a basic security system to an active architecture that is responsive and adaptive to real world situations. Due to the rapid adoption of AI in smart systems, there is increasing suspicion surrounding privacy issues and ethical ambiguity, as well as gaps when it comes to regulating these technologies. We provide an overview of AI in smart home security applications and examine the area of security, access control, intrusion detection, human action recognition, and research on intelligent automation. We summarize the last decade of evolution, with some summaries of previous on computer vision, authentication systems, and finding unusual patterns recently. Our key findings include the development of approaches to improve real time security monitoring, dramatic reductions in false alarms, and customization of home access using AI. Improvements in security have also increased risk with respect to ethical ambiguity as well as technical issues in certain cases. In this paper, we offers pathways for improved AI system design, proposed formal data protection regulations, and examples of simplifying complex system for user comprehension, which also establishes the groundwork for future efforts. Home security should balance new opportunities with ethical considerations.

Modern Dynamic Random Access Memory (DRAM) banks are characterized by their ability to work in parallel, enabling concurrent servicing of multiple memory accesses through the interleaved DRAM banks. This attractive feature is supported in modern DRAM systems by employing large-sized pages to exploit the locality that exists in the row-buffers. However, one of the key limiting factors for fully utilizing the Bank-Level Parallelism (BLP) feature is the increased contention among processing cores in multi-core systems. This may result in inefficient utilization of the available localities in row-buffers. This, in turn, leads to a degradation in DRAM performance and significant energy wastage. This is due to the activation of large pages only to access a small amount of data, typically 64 bytes. As a result, the likelihood of encountering critical power and performance timing constraints increases. In this article, we propose a highly parallel DRAM architecture designed to mitigate the adverse effects of increased memory contention in multi-core systems on DRAM performance and energy efficiency. Specifically, the DRAM architecture introduced in this study incorporates cost-effective modifications that reduce resource sharing among DRAM pages within a sub-array. This design enables concurrent access to wordlines of varying sizes belonging to different DRAM pages within the same sub-array of a memory bank. This enhancement in the utilization of the allocated bank’s row-buffer space significantly improves the performance and energy efficiency of DRAM systems by further enhancing intra- and inter-sub-array level parallelism. This also further relaxes critical DRAM timing restrictions and facilitates access to finer DRAM page granularities. Our experimental results for quad-core multi-program workloads showed that the DRAM architecture proposed in this study provides significant improvements in average memory access latency and overall DRAM energy consumption compared to the baseline, outperforming previously proposed mechanisms.

The rapid proliferation of IoT devices presents serious IoT network cybersecurity threats; hence, advanced IDSs are necessary. Signature and rule-based IDS mechanisms cannot address novel attacks, generate excessive alarms, and are computationally inefficient. Therefore, in response, in this paper, a machine learning IDS for IoT network real-time intrusion detection and anomaly categorization is proposed via black widow optimization (BWO) for optimal feature and hyperparameter selection. The IDS employs standard machine learning models, such as random forest and support vector machines (SVMs), and deep models, such as long short-term memory (LSTM), to address IoT environment nuances. The framework is evaluated on Bot-IoT and UNSW-NB15 datasets, such as various IoT-based attacks and normal traffic. The BWO algorithm maximizes feature reduction; for Bot-IoT, 57.1%; and for UNSW-NB15, 55.1%, while retaining better detection accuracy. Experimental evidence demonstrates the strength of the framework, where LSTM offers optimal detection accuracy (99.1%) and low false alarms (0.9%). The SVM model is computationally efficient and has a low training time (90 s), inference time (10 ms), space (200 MB) and power (40 joules). The framework's scalability is also an advantage, maintaining good precision despite expanding the dataset, and is therefore perfect for extensive IoT networks. The ability of BWO to rapidly converge ensures timely and efficient optimization, which is crucial for IoT applications in practice. The tradeoff between the capability to detect and the computational cost is achieved by the framework, overcoming the drawbacks of traditional IDSs and providing an efficient solution for IoT network protection. In conclusion, our solution innovates IoT security by using BWO and machine learning to ensure accurate detection, computational power, and scalability. The developed framework presents an efficient and effective solution for real-time intrusion detection, addressing the IoT's current and future needs for cybersecurity.

Modern DRAM devices’ performance and energy efficiency are significantly improved when the row-buffer locality is exploited properly. In multi-core architectures, however, the DRAM-based main memory banks used by the processing units, called cores, are shared. Memory interference, also known as memory contention, occurs when many cores contend for simultaneous access to the shared banks. The performance benefits provided by utilizing the available row-buffer locality are diminished by the increased memory contention brought on by the integration of more cores. Large DRAM page sizes are therefore activated in order to access only a tiny amount of data. Poor energy efficiency or wasted opportunity to loosen DRAM power timing restrictions are both downsides to this page over-fetching issue. This study introduces a Fine-Grained Activation (FGA) technique to reduce the number of involved bitlines when accessing DRAM memory. This technique significantly improves the parallelism at the DRAM subarray level to support multiple memory accesses routed to distinct subarrays inside the same memory bank. The FGA technique presented in this research intends to provide large energy savings while simultaneously delivering significant performance gains. Our evaluation findings with 4-core multi-program benchmarks demonstrate that the FGA technique proposed in this paper can significantly improve both DRAM performance and DRAM energy efficiency with a negligible area overhead. In comparison to the baseline, the Half-DRAM page activation mechanism, and the recently suggested FGA mechanism, the proposed technique in this study reduces the average DRAM memory access latency for the evaluated four-core applications by 25.6%, 27.1%, and 14.8%, respectively. Our introduced technique also decreases the DRAM activation power by an average of 47%, 27.1%, and 14.7%, respectively, when compared with the baseline, Half-DRAM technique, and the recently proposed FGA mechanism.

Security issues of telemedicine‐based secure transmission of medical images find a very thin line drawn between diagnostic acceptability and cybersecurity. Partial but imperfect solutions emerge. JPEG2000 and HEVC concentrate only on compression, failing to provide any security consideration. Although secure, blockchain‐based systems introduce latency that impedes fine‐grained medical telepresence. The methods of homomorphic encryption are one of the very secure options, but they are almost impossible to carry out computationally. Watermarking schemes are usually incapable of providing real‐time detection of tampering. Given these drawbacks, such as missing real‐time tamper detection and poor integration between compression and security, as well as prohibitively high computational overhead, are our points to tackle; we recommend a hybrid framework based on adaptive compressed sensing (ACS), Secure Hash Algorithm 3 (SHA‐3), and lightweight encryption. The proposed framework obtains an improved CR of up to 30% better than JPEG2000 (13.5 bpp against 10.2 on x‐ray images), an 8.8% improvement in PSNR (43.2 vs. 39.7 dB), and a 6.6% increase in SSIM (0.97 compared to 0.91). Real‐time tampering detection (5.6 ms) safeguards the system against replay attacks (6.2 ms). When optimized for low‐latency transmission over constrained telemedicine scenarios, the algorithm shows greater efficiency and robustness than previously proposed methods.