Abdelilah HAIJOUB

Dr. Abdelilah HAIJOUB

orcid

Research Focus & Metrics

Academic Career Length

4Years (2023-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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24 November 2024 in Journal of Imaging
Verified
Journal Article
Open access
PDF file
AHAbdelilah HAIJOUB
Abdelilah HAIJOUB
AHAnas Hatim
Anas Hatim
AGAntonio Guerrero Gonzalez
Antonio Guerrero Gonzalez
MAMounir Arioua
Mounir Arioua
CKCHOUGDALI Khalid
CHOUGDALI Khalid
The evolution of maritime surveillance is significantly marked by the incorporation of Artificial Intelligence and machine learning into Unmanned Surface Vehicles (USVs). This paper presents an AI approach for detecting and tracking unmanned surface vehicles, specifically leveraging an enhanced version of YOLOv8, fine-tuned for maritime surveillance needs. Deployed on the NVIDIA Jetson TX2 platform, the system features an innovative architecture and perception module optimized for real-time operations and energy efficiency. Demonstrating superior detection accuracy with a mean Average Precision (mAP) of 0.99 and achieving an operational speed of 17.99 FPS, all while maintaining energy consumption at just 5.61 joules. The remarkable balance between accuracy, processing speed, and energy efficiency underscores the potential of this system to significantly advance maritime safety, security, and environmental monitoring.

8 May 2023 in ITM Web of Conferences
Verified
Journal Article
Open access
PDF file
AHAbdelilah HAIJOUB
Abdelilah HAIJOUB
AHAnas Hatim
Anas Hatim
MAMounir Arioua
Mounir Arioua
SHSlama Hammia
Slama Hammia
AEAhmed Eloualkadi
Ahmed Eloualkadi
AGAntonio Guerrero-González
Antonio Guerrero-González
The implementation of CNN FPGA is of increasing importance due to the growing demand for low-power and high-performance edge AI applications. This paper presents a comprehensive survey and research on the topic, with a focus on comparing and evaluating the performance of two main FPGA architectures, streaming and single unit computing. The study includes a detailed evaluation of the state-of-the-art CNNs, LeNet-5 and YOLOv2, on both FPGA architectures. The results provide useful insights into the trade-offs involved, limitations, challenges, and the complexity of implementing CNNs on FPGAs. The paper highlights the difficulties and intricacies involved in implementing CNNs on FPGAs and provides potential solutions for improving performance and efficiency.

26 August 2023
Verified
Book Chapter
Closed access
PDF file
AHAbdelilah HAIJOUB
Abdelilah HAIJOUB
AHAnas Hatim
Anas Hatim
MAMounir Arioua
Mounir Arioua
SHSlama Hammia
Slama Hammia
AEAhmed Eloualkadi
Ahmed Eloualkadi
AGAntonio Guerrero Gonzalez
Antonio Guerrero Gonzalez

31 May 2024
Verified
Book Chapter
Closed access
PDF file
AHAbdelilah HAIJOUB
Abdelilah HAIJOUB
AHAnas Hatim
Anas Hatim
MAMounir Arioua
Mounir Arioua
AEAhmed Eloualkadi
Ahmed Eloualkadi
MGMaría Dolores Gómez-López
María Dolores Gómez-López

5 March 2026 in Sensors
Verified
Journal Article
Open access
PDF file
AHAbdelilah HAIJOUB
Abdelilah HAIJOUB
ABAissam Bekkari
Aissam Bekkari
AHAnas Hatim
Anas Hatim
MAMounir Arioua
Mounir Arioua
MSMohamed Nabil Srifi
Mohamed Nabil Srifi
AGAntonio Guerrero Gonzalez
Antonio Guerrero Gonzalez
Unmanned surface vehicles (USVs) increasingly rely on vision-based perception for safe navigation and maritime surveillance, while onboard computing is constrained by strict size, weight, and power (SWaP) budgets. Although deep convolutional neural networks (CNNs) offer strong recognition performance, their computational and memory requirements pose significant challenges for deployment on low-cost embedded platforms. This paper presents a hardware–software co-design architecture and deployment study for CNN acceleration on a heterogeneous ARM–FPGA system, targeting energy-efficient near-sensor processing for embedded maritime applications. The proposed approach exploits a fully streaming hardware architecture in the FPGA fabric, based on line-buffered convolutions and AXI-Stream dataflow, while the ARM processing system is responsible for lightweight configuration, scheduling, and data movement. The architecture was evaluated using representative CNN models trained on a maritime ship dataset. Our experimental results on a Zynq-7020 system-on-chip demonstrate that the proposed co-design strategy achieves a balanced trade-off between throughput, resource utilisation, and power consumption under tight embedded constraints, highlighting its suitability as a practical building block for onboard perception in USVs.