Inverse lithography technology (ILT) based on the gradient descent (GD) algorithm, which is a classical local optimal method, can effectively improve the lithographic imaging fidelity. However, due to the low-pass filtering effect of the lithography imaging system, GD, although able to converge quickly, is prone to fall into the local optimum for the information in the corner region of complex patterns. Considering the high-frequency information of the corner region during the optimization process, this paper proposes a resolution layering method to improve the efficiency of GD-based ILT algorithms. A corner-rounding-inspired target retargeting strategy is used to compensate for the over-optimization defect of GD for inversely optimizing the complex pattern layout. Furthermore, for ensuring the manufacturability of masks, differentiable top-hat and bottom-hat operations are employed to improve the optimization efficiency of the proposed method. To confirm the superiority of the proposed method, multiple optimization methods of ILT were compared. Numerical experiments show that the proposed method has higher optimization efficiency and effectively avoids the over-optimization.

Inverse lithography technology (ILT) plays a pivotal role in advanced semiconductor manufacturing because it enables pixel-level mask modifications, significantly enhances pattern fidelity, and expands process windows. However, traditional gradient-based ILT methods often struggle with the trade-off between imaging fidelity and mask manufacturability due to coupled optimization objectives. We propose a frequency-separated dual-stage optimization framework (FD-ILT) that strategically decouples these conflicting objectives by exploiting the inherent low-pass characteristics of lithographic systems. The first stage optimizes low-frequency (LF) components using hierarchical downsampling to generate a high-fidelity continuous transmission mask. This approach reduces computational complexity while refining resolution progressively. The second stage enforces manufacturability by exclusively adjusting high-frequency (HF) features through morphological regularization and progressive binarization penalties while maintaining the mask LF to preserve imaging accuracy. Our method achieves simultaneous control of both aspects by eliminating gradient conflicts between fidelity and manufacturing constraints. The simulation results demonstrate that FD-ILT achieves superior imaging quality and manufacturability compared to conventional gradient-based ILT methods, offering a scalable solution for advanced semiconductor nodes.