Threshold voltage ( V _TH ) degradation mechanisms induced by the ionizing irradiation for the 1200V double trench (DT) SiC MOSFET are investigated. The ionizing irradiation experiment is performed with different gate-source voltages ( V _GS ) and total ionizing doses (TID). The maximum V _TH shifts are -1.92 V for V _GS of 0 V and TID of 500 krad(Si), and -4.73 V for V _GS of 20 V and TID of 150 krad(Si), respectively. A novel method of investigation on TID-induced V _TH shift from energy domain and numerical simulation with the aid of the TCAD tool is exploited. Extensive simulations indicate that donor-like oxide traps with energy larger than 0.55 eV dominate the negative V _TH shift. The summation of two Gaussian distribution models is used to emulate trapped hole energy distribution, the relative errors between measured and simulated V _TH shifts are within ±13.36% at TID of 100 krad(Si).

In this article, a novel double-trench SiC MOSFET with an integrated MOS-channel diode (MCD) is proposed and analyzed through TCAD simulations. The MCD incorporates a short channel, where the channel length can be adjusted by modifying the recess depth. Owing to the drain-induced barrier-lowering (DIBL) effect, a low potential barrier is created for electrons flowing from the JFET region to the N+ source region. This effectively eliminates the bipolar degradation of the parasitic body p-i-n diode and reduces the cut-in voltage $V_{\mathrm{on}}$ by 69.2%. Additionally, the breakdown voltage (BV) remains nearly unchanged. The reduction in the p-well region alleviates the JFET effect, successfully lowering the specific on-resistance $R_{\mathrm{on},\mathrm{sp}}$, making the channel easier to turn on, and reducing the threshold voltage ($V_{\mathrm{th}}$). However, the increase in the gate charge $Q_{\mathrm{g}}$ results in a slight rise in the switching loss.