A commercially available Janus paper with one hydrophobic (polyethylene-coated) face and a hygroscopic/hydrophilic one is irreversibly bonded to a polydimethylsiloxane (PDMS) substrate incorporating microfluidic channels via corona discharge surface treatment. The bond strength between the polymer-coated side and PDMS is characterized as a function of corona treatment time and annealing temperature/time. A maximum strength of 392 kPa is obtained with a 2 min corona treatment followed by 60 min of annealing at 120 °C. The water contact angle of the corona-treated polymer side decreases with increased discharge duration from 98° to 22°. The hygroscopic/hydrophilic side is seeded with human lung fibroblast cells encapsulated in a methacrylated gelatin (GelMA) hydrogel to show the potential of this technology for nutrient and chemical delivery in an air–liquid interface cell culture.

Since December 2019, the SARS-CoV-2 outbreak that began in Wuhan, China has spread to nearly every continent and become a global health concern. Although much has been discovered about COVID-19 and...

The proliferation of battery-operated end-user electronic devices due to technological advancements, especially in medical image processing applications, demands low power consumption, high-speed operation, and efficient coding. The design of these devices is centered on the Application-Specific Integrated Circuits (ASIC), General Purpose Processors (GPP), and Field Programmable Gate Array (FPGA) frameworks. The need for low-power functional blocks arises from the growing demand for high-performance computational units that are part of high-speed processors operating at high clock frequencies. The operational speed of the processor is determined by the computational unit, which is the workhorse of high-speed processors. A novel approach to integrating Very Large-Scale Integration (VLSI) ASIC design and the concepts of low-power VLSI compatible with medical image compression was embraced in this research. The focus of this study was the design, development, and implementation of a Power Delay Product (PDP) optimized computational unit targeted for medical image compression using ASIC design flow. This stimulates the research community’s quest to develop an ideal architecture, emphasizing on minimizing power consumption and enhancing device performance for medical image processing applications. The study uses area, delay, power, PDP, and Peak Signal-to-Noise Ratio (PSNR) as performance metrics. The research work takes inspiration from this and aims to enhance the efficiency of the computational unit through minor design modifications that significantly impact performance. This research proposes to explore the trade-off of high-performance adder and multiplier designs to design an ASIC-based computational unit using low-power techniques to enhance the efficiency in power and delay. The computational unit utilized for the digital image compression process was synthesized and implemented using gpdk 45 nm standard libraries with the Genus tool of Cadence. A reduced PDP of 46.87% was observed when the image compression was performed on a medical image, along with an improved PSNR of 5.89% for the reconstructed image.

Here, we present a facile method for rapid fabrication of low-cost, stretchable electrical interconnections for wearable electronics. Using a commercial sewing machine, thin metallic wires are sewn onto the wearable materials in a double-stitch zigzag pattern, with the second stitch being a water-soluble polyvinyl alcohol (PVA) thread. The stretchable pattern is secured onto a clothing (e.g., a glove) with a stretchable elastomer coating followed by dissolution of the PVA thread in water. The interconnections maintain a constant electrical conductivity for strains up to 50 % and bending cycles over 15000. As a proof of concept implementation, we sewed interconnects and a soft capacitive force sensor onto a latex glove to create a wearable tactile sensor with a linear sensitivity of 96 fF/N.