Nowadays, the Internet of Underwater Things (IoUT) provides many marine 5G applications. However, it has some issues with energy efficiency and network lifetime. The network clustering approach is efficient for optimizing energy consumption, especially for underwater acoustic communications. Recently, many algorithms have been developed related to clustering-based underwater communications for energy efficiency. However, these algorithms have drawbacks when considered for heterogeneous IoUT applications. Clustering efficiency in heterogeneous IoUT is influenced by the uniform distribution of cluster heads (CHs). As a result, conventional schemes are inefficient when CHs are arranged in large and dense nodes since they are unable to optimize the right number of CHs. Consequently, the clustering approach cannot improve the IoUT network, and many underwater nodes will rapidly consume their energies and be exhausted because of the large number of clusters. In this paper, we developed an efficient clustering scheme to effectively select the best CHs based on artificial bee colony (ABC) and Q-learning optimization approaches. The proposed scheme enables an effective selection of the CHs based on four factors, the residual energy level, the depth and the distance from the base station, and the signal quality. We first evaluate the most suitable swarm algorithms and their impact on improving the CH selection mechanism. The evaluated algorithms are generic algorithm (GA), particle swarm optimization (PSO), ant colony optimization (ACO), and ABC. Then, the ABC algorithm process is improved by using the Q-learning approach to improve the process of ABC and its fitness function to optimize the CH selection. We observed from the simulation performance result that an improved ABC-QL scheme enables efficient selection of the best CHs to increase the network lifetime and reduce average energy consumption by 40% compared to the conventional ABC.

This paper presents a robust and efficient Convolutional Neural Network (CNN)-based channel estimator for fifth-generation (5G) Orthogonal Frequency Division Multiplexing (OFDM) systems. While conventional Least Squares (LS) and Minimum Mean Square Error (MMSE) estimators degrade significantly in high-mobility, non-linear, and frequency-selective fading environments, the proposed framework treats the time-frequency resource grid as a spatial image, enabling implicit learning of complex fading dynamics without explicit statistical modeling. The model is trained on 105 synthetic channel realizations spanning Rayleigh, Rician (K = 5 dB), AWGN, CDL-A, CDL-B, and TDL-A channel profiles and validated through rigorous MATLAB simulations. Key quantitative results demonstrate: (i) a 7-fold BER reduction over MMSE at 20 dB SNR on CDL- A (1.0 × 10⁻³ vs. 7.0 × 10⁻³); (ii) a 3–5 dB NMSE improvement across the full 0–30 dB SNR range; (iii) robust performance under Doppler spreads up to 300 km/h with less than 0.5 dB BER penalty; (iv) a 50% reduction in pilot overhead while maintaining superior MSE performance; and (v) spectral efficiency within 0.35 bits/s/Hz of the perfect-CSI Shannon bound. With a measured inference latency of 0.8 ms and a lightweight design of 2.3 × 10⁶ parameters, the proposed CNN-CE is validated as a practically deployable and resource-efficient technology for 5G and beyond-5G (B5G) networks.

Software-Defined Networking (SDN) centralizes control logic but exposes the controller–switch channel to message injection and flow rule manipulation, while conventional TLS key exchange relies on public-key assumptions that are vulnerable in the quantum era. This paper presents a practical QKDenhanced SDN control plane that uses quantum-derived keys in real cryptographic enforcement, not merely for key generation. We implement: (i) a QKD-driven key management subsystem with key typing, rotation policies, and explicit key synchronization messaging; (ii) a controller-side OpenFlow FlowMod authentication mechanism that attaches HMAC-SHA256 tags and key identifiers with replay-protection metadata; and (iii) a TLS pre-shared key (PSK) control channel in which BB84-derived keys replace classical key exchange material. The system is evaluated in Mininet using a multi-switch topology (12 switches, 24 hosts) and comparative baselines (no security and classical RSATLS). Experimental results show stable quantum key material generation with 45.3 ms average latency per 256-bit key and 98.7% success rate, while QBER remains safely below the BB84 threshold (mean 4.8%, max 10.3% over 1,000 generations). Under secure operation, FlowMod installation latency increases from 13.2 ms (classical RSA-TLS) to 17.6 ms (+33.3%), with moderate resource overhead (CPU 21.7% vs 17.9%; memory 218 MB vs 183 MB at 12 switches). The architecture scales predictably (linear setup-time trend) and sustains a maximum throughput of 7,580 packets/s under load. A dual-controller deployment further provides availability improvements with 1.2 s failover time at modest additional overhead. Overall, the results demonstrate that QKD-derived keys can be integrated into SDN controlplane authentication and secure channels with measurable, stable overhead while providing quantum-resilient security foundations.

Active reconfigurable intelligent surfaces amplify the reflected signal using amplifiers integrated into their elements. The signal model adopted throughout the literature treats each amplifier as a constant gain applied jointly to the incident signal and to the thermal noise of the element. Its experimental validation was performed at a single, very low incident power, far below the level at which an amplifier compresses. This article examines channel estimation when the amplifier is driven near saturation. Adopting an established nonlinear surface model, we show that the equivalent gain depends on the pilot power, so the closed-form training results of the linear model no longer hold: the conventional estimator becomes biased, the published training rules lose their optimality, and the estimation error exhibits a floor. We split the amplifier distortion into a static per-element component and a fluctuating component, and derive closed-form expressions for the error variance, the estimator bias, and the resulting floors, together with a Gaussian-equivalent variance bound. The expressions agree with Monte Carlo simulation to within 0.25 dB over twelve configurations. A numerical Bayes-MMSE benchmark that uses the exact Rapp response is at most 1.3 dB better than the Bussgang-based linear estimator, so the linearization costs little. Three consequences follow: the conventional estimator degrades once the pilot power passes a threshold; additional receive antennas, surface elements and training slots do not remove the floor in the simulated regime, because its dominant component is static, and this holds for rank-one, Rician and Rayleigh backward channels alike; and the published rule for the training amplification points the wrong way unless the receiver noise is high or the amplifier headroom is large. We then propose an online gain-tracking scheme that identifies the operating back-off from the ratio of two estimates taken at different pilot powers, needing no baseband processing at the surface, and we quantify its sensitivity to finite samples, channel aging, parameter drift and shape mismatch. Finally, we characterize robustness across amplifier models, element spread, and system scale and identify the region in which compensation helps.

Optical burst switching (OBS) is an optical switching technology; it uses an optical fiber's high bandwidth potential to transfer huge amounts of data in the form of huge packets, which are more commonly referred to as bursts. High burst loss brought on by numerous burst contentions is a significant problem in OBS. An intelligent fuzzy offset time algorithm (FOT) algorithm is suggested to overcome this problem. This study proposed Intelligent Fuzzy Offset Time (FOT) algorithms that adjust offset time (OT) in accordance with network and traffic conditions. The fuzzy input for FOT is made up of three parameters: burst size, distance, and time that burst spent in queuing. The suggested algorithm is assessed versus the Intelligent OT algorithms using the Five defuzzification techniques (Centroid (CM00), Bisector (BM04), largest of maximum (LM02), smallest of maximum (SM03), and mean of maximum (MM01) when Maximum (M) accumulation technique is used, when using Algebraic Sum (S) aggregation methods (Centroid (CS00), Bisector (BS04), largest of maximum (LS02), smallest of maximum (SS03), and mean of maximum (MS01). Simulation results have shown that FOT LM02, FOT LS02, FOT SM03 and FOT LS02 have effects on reducing BLR (burst loss ratio) and E2E (End-2-End) delayed respectively when compared to other defuzzification techniques algorithms. FOT LM02 and FOT SM03 can be used to intelligently adjust the offset parameter using the incoming traffic load and the three parameters.

Deep learning (DL) model performance is intricately tied to the quality of training, influenced by several parameters. Of these, the computing unit employed significantly impacts training efficiency. Traditional setups use central processing units (CPUs) or graphics processing units (GPUs) for DL training. This paper proposes an alternative using field programmable gate arrays (FPGAs) for DL training, leveraging their customizable and parallelizable architecture. FPGA programming allows for tailored circuit designs, optimizing DL training requirements and enabling efficient parallel processing. The use of FPGAs in DL training has garnered attention for their potential in achieving high computational throughput and energy efficiency, attributed to advantages like low latency, high bandwidth, and reconfigurability. By exploiting FPGA parallel processing capabilities, faster training times and the potential for larger, more complex DL models are feasible. This paper provides an overview of state-of-the-art techniques for FPGA-based DL model training, discussing challenges such as hardware architecture design, memory management, and algorithm optimization. Additionally, various FPGA-based DL frameworks and libraries facilitating DL model development and deployment on FPGAs are explored.