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Dixian Zhao; Peng Gu; Jiecheng Zhong; Na Peng; Mengru Yang; Yongran Yi; Jiajun Zhang; Pingyang He; Yuan Chai; Zhihui Chen; Xiaohu You. Corrections to ``Millimeter-Wave Integrated Phased Arrays''. IEEE Transactions on Circuits and Systems I: Regular Papers 2021, PP, 1 -1.
AMA StyleDixian Zhao, Peng Gu, Jiecheng Zhong, Na Peng, Mengru Yang, Yongran Yi, Jiajun Zhang, Pingyang He, Yuan Chai, Zhihui Chen, Xiaohu You. Corrections to ``Millimeter-Wave Integrated Phased Arrays''. IEEE Transactions on Circuits and Systems I: Regular Papers. 2021; PP (99):1-1.
Chicago/Turabian StyleDixian Zhao; Peng Gu; Jiecheng Zhong; Na Peng; Mengru Yang; Yongran Yi; Jiajun Zhang; Pingyang He; Yuan Chai; Zhihui Chen; Xiaohu You. 2021. "Corrections to ``Millimeter-Wave Integrated Phased Arrays''." IEEE Transactions on Circuits and Systems I: Regular Papers PP, no. 99: 1-1.
Large-scale millimeter-wave (mm-Wave) integrated phased array is the key technology to enable broadband 5G and satellite communications. This paper details the design considerations, challenges and trade-offs of mm-Wave integrated phased arrays based on bulk CMOS and multi-layer hybrid PCB technologies. Both technologies attain high yield and low cost for mass production. Important beamforming building blocks are addressed and compared in detail. Demonstrators of integrated phased arrays are presented from circuit to board levels. The 1024- and 4096-element integrated phased arrays achieve the EIRP of 72.5 and 84.0 dBm respectively. Finally, relevant phased-array transceivers and antennas from the recent literature are discussed.
Dixian Zhao; Peng Gu; Jiecheng Zhong; Na Peng; Mengru Yang; Yongran Yi; Jiajun Zhang; Pingyang He; Yuan Chai; Zhihui Chen; Xiaohu You. Millimeter-Wave Integrated Phased Arrays. IEEE Transactions on Circuits and Systems I: Regular Papers 2021, PP, 1 -14.
AMA StyleDixian Zhao, Peng Gu, Jiecheng Zhong, Na Peng, Mengru Yang, Yongran Yi, Jiajun Zhang, Pingyang He, Yuan Chai, Zhihui Chen, Xiaohu You. Millimeter-Wave Integrated Phased Arrays. IEEE Transactions on Circuits and Systems I: Regular Papers. 2021; PP (99):1-14.
Chicago/Turabian StyleDixian Zhao; Peng Gu; Jiecheng Zhong; Na Peng; Mengru Yang; Yongran Yi; Jiajun Zhang; Pingyang He; Yuan Chai; Zhihui Chen; Xiaohu You. 2021. "Millimeter-Wave Integrated Phased Arrays." IEEE Transactions on Circuits and Systems I: Regular Papers PP, no. 99: 1-14.
This paper presents a single-ended, two-stage, and symmetric Doherty power amplifier (DPA). A rigorous and closed-form formula is proposed to design the transformer-based quadrature hybrid. The hybrid combines the advantages of flexibility, compactness, and low loss. A non-classic Doherty impedance inverting network is co-designed with the input network for phase matching. Besides, the parasitic parameters of the interconnects and RF pads are used to reduce the value of the inductor in the LC network. Designed and implemented in a 65-nm CMOS process, the fully integrated compact DPA prototype occupies only 0.35 mm2 active area. The experimental prototype operating at 28 GHz achieves 18.7% power-added efficiency (PAE) at 6-dB power back-off (PBO). A maximum small-signal gain of 20.4 dB is achieved with a -3-dB bandwidth from 25.6 to 29.4 GHz. A saturated output power (PSAT) of 17.5 dBm is measured with the peak PAE of 27%. At 6-dB PBO, the DPA prototype increases the efficiency by 2.8 and 1.4 times over a normalized Class-B and Class-A PA, respectively.
Chongyu Yu; Jun Feng; Dixian Zhao. A 28-GHz Doherty Power Amplifier With a Compact Transformer-Based Quadrature Hybrid in 65-nm CMOS. IEEE Transactions on Circuits and Systems II: Express Briefs 2021, 68, 2790 -2794.
AMA StyleChongyu Yu, Jun Feng, Dixian Zhao. A 28-GHz Doherty Power Amplifier With a Compact Transformer-Based Quadrature Hybrid in 65-nm CMOS. IEEE Transactions on Circuits and Systems II: Express Briefs. 2021; 68 (8):2790-2794.
Chicago/Turabian StyleChongyu Yu; Jun Feng; Dixian Zhao. 2021. "A 28-GHz Doherty Power Amplifier With a Compact Transformer-Based Quadrature Hybrid in 65-nm CMOS." IEEE Transactions on Circuits and Systems II: Express Briefs 68, no. 8: 2790-2794.
The technology of vital signs detection has been proven of great use, whereas it is still limited by several challenges. One of the major challenges is the random body movements (RBMs), which significantly degrade the accuracy of the measurement. In this paper, a multi-channel 77GHz linear frequency modulated continuous-wave (LFMCW) radar system is investigated to perform vital signs monitoring on multiple targets with the mitigation of RBMs and a novel vital signs detection scheme is provided for the accurate estimates of the respiration rate (RR) and heart rate (HR). In the proposed scheme, a multi-channel Kalman smoother is firstly proposed to address the outliers in the extracted phase histories from the echoes in the multiple receivers, so that enhanced outlier-robust phase histories are acquired for the subsequent estimates of the RR and HR. Furthermore, a novel regional hidden Markov model is then proposed to carry out accurate estimates of RR and HR by exploiting the underlying slowly-varying characteristics of these vital signs for further mitigation of the effects of RBMs. Experimental results demonstrate that the estimated errors in the proposed scheme are less than 2 beats per minute (bpm) for both RR and HR under normal scenarios with young men in the RBMs environment.
Qisong Wu; Zengyang Mei; Zhichao Lai; Dianze Li; Dixian Zhao. A Non-Contact Vital Signs Detection in a Multi-Channel 77GHz LFMCW Radar System. IEEE Access 2021, 9, 49614 -49628.
AMA StyleQisong Wu, Zengyang Mei, Zhichao Lai, Dianze Li, Dixian Zhao. A Non-Contact Vital Signs Detection in a Multi-Channel 77GHz LFMCW Radar System. IEEE Access. 2021; 9 (99):49614-49628.
Chicago/Turabian StyleQisong Wu; Zengyang Mei; Zhichao Lai; Dianze Li; Dixian Zhao. 2021. "A Non-Contact Vital Signs Detection in a Multi-Channel 77GHz LFMCW Radar System." IEEE Access 9, no. 99: 49614-49628.
This article presents a Ku-band power amplifier with a series-shunt LC notch filter in 65-nm CMOS. The notch filter is integrated into the inter-stage matching network to attenuate the receiver-band noise, thereby reducing transmitter-to-receiver interference. A comprehensive analysis of the series and the shunt notch filters, as well as the position to apply the notch filter is discussed. Besides, a systematic method of optimizing passive devices in the notch filter is proposed to further improve network Q and minimize the influence on the power amplifier. Fabricated in 65-nm CMOS technology, the power amplifier prototype delivers a measured gain of 21.9 dB with 3-dB bandwidth from 13.7 GHz to 16.7 GHz at the nominal state. At 14.2 GHz, it can offer a saturated output power of 14.5 dBm with peak power added efficiency of 24.1%. The notch frequency is adjustable from 10.3 to 11.9 GHz to offer the best attenuation at the receiver band. From 10 to 12 GHz, a maximal attenuation of 30 dB is achieved. The design occupies a core area of 0.35x0.85 mm².
Jiecheng Zhong; Dixian Zhao; Xiaohu You. A Ku-Band CMOS Power Amplifier With Series-Shunt LC Notch Filter for Satellite Communications. IEEE Transactions on Circuits and Systems I: Regular Papers 2021, PP, 1 -12.
AMA StyleJiecheng Zhong, Dixian Zhao, Xiaohu You. A Ku-Band CMOS Power Amplifier With Series-Shunt LC Notch Filter for Satellite Communications. IEEE Transactions on Circuits and Systems I: Regular Papers. 2021; PP (99):1-12.
Chicago/Turabian StyleJiecheng Zhong; Dixian Zhao; Xiaohu You. 2021. "A Ku-Band CMOS Power Amplifier With Series-Shunt LC Notch Filter for Satellite Communications." IEEE Transactions on Circuits and Systems I: Regular Papers PP, no. 99: 1-12.
This letter reports an E‐band phase‐inverting variable gain amplifier in 65‐nm complementary metal‐oxide‐semiconductor (CMOS) technology. A fractional bit based structure with replica cells is proposed to minimise the phase error and ensure the tuning accuracy between different gain modes. This structure has 9‐bits digital‐controlled amplifiers and allows 180° phase shifting. The implemented phase‐inverting variable gain amplifier achieves 16 dB tuning range and 0.5 dB tuning step at 80 GHz. The root mean square (RMS) gain and phase errors across −3 dB bandwidth (i.e. 72–87 GHz) are less than 0.3 dB and 2.7°, respectively. The phase‐inverting variable gain amplifier consumes 8 mW at 1 V supply voltage.
Yikun Feng; Dixian Zhao. E‐band broadband digital controlled phase‐inverting variable gain amplifier in 65‐nm CMOS. Electronics Letters 2021, 57, 179 -182.
AMA StyleYikun Feng, Dixian Zhao. E‐band broadband digital controlled phase‐inverting variable gain amplifier in 65‐nm CMOS. Electronics Letters. 2021; 57 (4):179-182.
Chicago/Turabian StyleYikun Feng; Dixian Zhao. 2021. "E‐band broadband digital controlled phase‐inverting variable gain amplifier in 65‐nm CMOS." Electronics Letters 57, no. 4: 179-182.
This paper presents a passive vector-modulated phase shifter (VMPS). The passive X-type attenuator consisting of digitally controlled transistor-array units is employed to perform the phase-invertible gain tuning, and thus enables phase shift in all four quadrants. The Wilkinson-like power combiner is utilized to sum up the quadrature signals and avoid impedance mismatches. Analysis proves that the proposed passive VMPS can provide consistent phase-shift performance for bidirectional operation. The proof-of-concept VMPS is implemented in 40-nm CMOS technology and occupies a core chip area of 0.15 mm². Measured results prove that it can provide consistent bidirectional 6-bit phase-shift operation, with accurate phase tuning (i.e., RMS phase error < 2.4°) and low gain error (i.e., ± 0.6 dB) over the whole 70-90 GHz band.
Peng Gu; Dixian Zhao; Xiaohu You. Analysis and Design of a CMOS Bidirectional Passive Vector-Modulated Phase Shifter. IEEE Transactions on Circuits and Systems I: Regular Papers 2021, 68, 1398 -1408.
AMA StylePeng Gu, Dixian Zhao, Xiaohu You. Analysis and Design of a CMOS Bidirectional Passive Vector-Modulated Phase Shifter. IEEE Transactions on Circuits and Systems I: Regular Papers. 2021; 68 (4):1398-1408.
Chicago/Turabian StylePeng Gu; Dixian Zhao; Xiaohu You. 2021. "Analysis and Design of a CMOS Bidirectional Passive Vector-Modulated Phase Shifter." IEEE Transactions on Circuits and Systems I: Regular Papers 68, no. 4: 1398-1408.
This article presents a W-band rectenna unit that incorporates a novel CMOS switching rectifier and a print tapered slot antenna. The operation principle of the switching rectifier is analyzed. The proposed rectifier topology shows improved reliability, and it utilizes the body-diode effect (BDE) to improve power conversion efficiency (PCE). Besides, a high-gain W-band antipodal linearly tapered slot antenna is implemented on PCB to improve the overall efficiency. In order to demonstrate the utility of the proposed rectenna unit for large-scale rectenna array, a 1x 2 (parallel) and 2x 2 (series-parallel) rectenna arrays in 40-nm bulk CMOS technology and PCB process have been implemented. The switching rectifier achieves a peak PCE of 45.8% at 94GHz with improved reliability. Occupying only 0.0756 mm², the overall PCEs of the rectenna unit and the 2x 2 rectenna array are 25% and 23%, delivering 5.6- and 20-mW output dc power, respectively, at 90-mW/cm² incident power density. The proposed rectifier and rectenna array achieve the highest PCE among recently reported W-band rectifiers and rectenna arrays with different technologies.
Pingyang He; Dixian Zhao; Liang Liu; Jie Xu; Qianglin Zheng; Chuan Yu; Xiaohu You. A W-Band 2 × 2 Rectenna Array With On-Chip CMOS Switching Rectifier and On-PCB Tapered Slot Antenna for Wireless Power Transfer. IEEE Transactions on Microwave Theory and Techniques 2020, 69, 969 -979.
AMA StylePingyang He, Dixian Zhao, Liang Liu, Jie Xu, Qianglin Zheng, Chuan Yu, Xiaohu You. A W-Band 2 × 2 Rectenna Array With On-Chip CMOS Switching Rectifier and On-PCB Tapered Slot Antenna for Wireless Power Transfer. IEEE Transactions on Microwave Theory and Techniques. 2020; 69 (1):969-979.
Chicago/Turabian StylePingyang He; Dixian Zhao; Liang Liu; Jie Xu; Qianglin Zheng; Chuan Yu; Xiaohu You. 2020. "A W-Band 2 × 2 Rectenna Array With On-Chip CMOS Switching Rectifier and On-PCB Tapered Slot Antenna for Wireless Power Transfer." IEEE Transactions on Microwave Theory and Techniques 69, no. 1: 969-979.
This paper demonstrates a Ka-band 4-beam phased array receiver in 65-nm CMOS. To generate four balanced beams from two inputs, a passive 4-beam symmetrical differential network is employed to achieve balanced signal distribution. With the use of passive vector-modulated phase shifter and switched-type attenuator, the receiver consumes a current of only 40 mA under 1 V supply voltage. The 4-beam receiver shows 3 dB gain per channel. From 27 to 31 GHz, the RMS gain error and phase error are < 0.4 dB and < 4∘, respectively. Beam to beam couplings are investigated and the measured beam-to-beam isolation is better than -32 dB from 27 to 31 GHz. The chip size is 2.6 × 4 mm2 with pads included. To author’s knowledge, this work reports the first CMOS phased-array receiver with four balanced beams.
Na Peng; Peng Gu; Xiaohu You; Dixian Zhao. A Ka-Band CMOS 4-Beam Phased-Array Receiver With Symmetrical Beam-Distribution Network. IEEE Solid-State Circuits Letters 2020, 3, 410 -413.
AMA StyleNa Peng, Peng Gu, Xiaohu You, Dixian Zhao. A Ka-Band CMOS 4-Beam Phased-Array Receiver With Symmetrical Beam-Distribution Network. IEEE Solid-State Circuits Letters. 2020; 3 (99):410-413.
Chicago/Turabian StyleNa Peng; Peng Gu; Xiaohu You; Dixian Zhao. 2020. "A Ka-Band CMOS 4-Beam Phased-Array Receiver With Symmetrical Beam-Distribution Network." IEEE Solid-State Circuits Letters 3, no. 99: 410-413.
This paper presents an ultra-broadband 5-bit switched-type attenuator (STA). Three attenuation topologies are employed for the design of the attenuation cells, including the T-type, simplified T-type and Π -type topologies. For each attenuation topology, the optimal values of the series and shunt resistors are derived to achieve accurate amplitude tuning and ensure good impedance matching. The capacitive compensation technique is adopted by both the T-type and Π -type topologies to enhance the high-frequency performance. Based on the proposed optimization techniques, a systematic design methodology is developed for the STA. The 5-bit STA is implemented in 65-nm CMOS technology and occupies a core chip area of only 0.036 mm². It exhibits ultra-broadband operation with 15.5-dB amplitude tuning range and 0.5-dB tuning step. The insertion loss of the reference state is 1.5 - 5.9 dB from DC to 50 GHz. The return loss is better than 12 dB for all the 32 states. The RMS amplitude error and phase error are less than 0.25 dB and 3.5° over the DC - 50 GHz band.
Peng Gu; Dixian Zhao; Xiaohu You. A DC-50 GHz CMOS Switched-Type Attenuator With Capacitive Compensation Technique. IEEE Transactions on Circuits and Systems I: Regular Papers 2020, 67, 3389 -3399.
AMA StylePeng Gu, Dixian Zhao, Xiaohu You. A DC-50 GHz CMOS Switched-Type Attenuator With Capacitive Compensation Technique. IEEE Transactions on Circuits and Systems I: Regular Papers. 2020; 67 (10):3389-3399.
Chicago/Turabian StylePeng Gu; Dixian Zhao; Xiaohu You. 2020. "A DC-50 GHz CMOS Switched-Type Attenuator With Capacitive Compensation Technique." IEEE Transactions on Circuits and Systems I: Regular Papers 67, no. 10: 3389-3399.
A 20-GHz low-power low-noise amplifier (LNA) in 65-nm CMOS is presented. The LNA is cascaded with a single-ended gₘ-boosted common-gate (CG) stage and a differential neutralized common-source (CS) stage. Current-reuse technique is employed to save the power consumption with little deterioration in gain and noise figure (NF). The transformer-based gₘ-boost technique in the CG stage and neutralization technique in CS stage further enhances the RF performances. Inter-stage magnetically coupled resonator (MCR) extends the bandwidth. An elaborate analysis of the current-reused CG-CS LNA using a transformer-based gₘ-boost technique and transformer-based MCR is proposed. Fabricated in 65-nm CMOS technology, the LNA achieves a measured power gain of 14.9 dB at 21 GHz with a -3-dB bandwidth of 4.8 GHz. The lowest NF is 3.3 dB at 19.5 GHz and is below 4 dB from 17 to 21 GHz. The LNA consumes 1.9 mW from a 1-V supply, with a chip area of 600 μm x 700 μm.
Jiajun Zhang; Dixian Zhao; Xiaohu You. A 20-GHz 1.9-mW LNA Using g m-Boost and Current-Reuse Techniques in 65-nm CMOS for Satellite Communications. IEEE Journal of Solid-State Circuits 2020, 55, 2714 -2723.
AMA StyleJiajun Zhang, Dixian Zhao, Xiaohu You. A 20-GHz 1.9-mW LNA Using g m-Boost and Current-Reuse Techniques in 65-nm CMOS for Satellite Communications. IEEE Journal of Solid-State Circuits. 2020; 55 (10):2714-2723.
Chicago/Turabian StyleJiajun Zhang; Dixian Zhao; Xiaohu You. 2020. "A 20-GHz 1.9-mW LNA Using g m-Boost and Current-Reuse Techniques in 65-nm CMOS for Satellite Communications." IEEE Journal of Solid-State Circuits 55, no. 10: 2714-2723.
Mingyu Zhu; Dixian Zhao. Geometric Analysis and Systematic Design of Millimeter-Wave Low-Power Frequency Dividers in 65-nm CMOS. IEEE Access 2020, 8, 20658 -20665.
AMA StyleMingyu Zhu, Dixian Zhao. Geometric Analysis and Systematic Design of Millimeter-Wave Low-Power Frequency Dividers in 65-nm CMOS. IEEE Access. 2020; 8 ():20658-20665.
Chicago/Turabian StyleMingyu Zhu; Dixian Zhao. 2020. "Geometric Analysis and Systematic Design of Millimeter-Wave Low-Power Frequency Dividers in 65-nm CMOS." IEEE Access 8, no. : 20658-20665.
In this article, a high-throughput, high-accuracy, area-efficient, and energy-efficient digital outphasing modulator (OPM) is proposed for millimeter-wave transmitters. This digital OPM is entirely based on the fixed-point unrolled and pipelined radix-2 COordinate Rotation Digital Computer (CORDIC) algorithm, which is suitable for outphasing transmitters based on both IQ and phase modulation architectures. The outphasing angle is calculated by a mixture of single-CORDIC and double-CORDIC algorithm, which significantly reduces the critical path delay. Due to architectural advantages, its error performance, sampling rate, power efficiency, and area efficiency are improved. According to FPGA implementation measurements, this architecture enables a 12-bit OPM to achieve error vector magnitude (EVM) of 0.062% and peak sampling rate of 0.74 GSample/s. According to the postlayout spice-level simulation in 65-nm CMOS, a high-throughput version can work at a peak data rate of 1.85 GSample/s at 1-V supply. A low-power version reduces the area consumption to only 0.088 mm², consuming 28.1 pJ/Sample at 0.78 GSample/s at 0.8-V supply. The proposed high-throughput OPM with the minimized area is expected to further open up an application area of energy-efficient low-cost millimeter-wave transmitters.
Diwei Li; Dixian Zhao. High-Throughput Low-Power Area-Efficient Outphasing Modulator Based on Unrolled and Pipelined Radix-2 CORDIC. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2019, 28, 480 -491.
AMA StyleDiwei Li, Dixian Zhao. High-Throughput Low-Power Area-Efficient Outphasing Modulator Based on Unrolled and Pipelined Radix-2 CORDIC. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2019; 28 (2):480-491.
Chicago/Turabian StyleDiwei Li; Dixian Zhao. 2019. "High-Throughput Low-Power Area-Efficient Outphasing Modulator Based on Unrolled and Pipelined Radix-2 CORDIC." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28, no. 2: 480-491.
This article proposes the concept of millimeter-wave (mm-wave) switching rectifiers originated from drain-pumped mixers. The topology and circuit design methodology are distinctly different from other CMOS mm-wave rectifiers which adopt voltage multiplier techniques. Operation principle and RF-to-dc power conversion efficiency (PCE) of the proposed switching rectifiers are analyzed to overcome the fundamental limits on achievable performance of switching rectifiers at mm wave. In order to demonstrate the utility of the proposed concept, two prototypes in 65-nm bulk CMOS technology have been implemented: two fully integrated switching rectifiers operating at Ka-band and W-band. A peak PCE of 36.5% at 35 GHz with a load resistance of 50 Ω at about 15-dBm input power is measured for the Ka-band rectifier. Measurement results for the W-band rectifier also indicate that the PCE peaks at 27% at 91 GHz for a load resistance of 43 Ω at about 16-dBm input power. To the best of our knowledge, the two fully integrated rectifiers which occupy the smallest chip area exhibit a competitive PCE reported among Ka-band and W-band CMOS rectifiers, competing well with GaAs counterparts where the Schottky diode is available.
Pingyang He; Dixian Zhao. High-Efficiency Millimeter-Wave CMOS Switching Rectifiers: Theory and Implementation. IEEE Transactions on Microwave Theory and Techniques 2019, 67, 5171 -5180.
AMA StylePingyang He, Dixian Zhao. High-Efficiency Millimeter-Wave CMOS Switching Rectifiers: Theory and Implementation. IEEE Transactions on Microwave Theory and Techniques. 2019; 67 (12):5171-5180.
Chicago/Turabian StylePingyang He; Dixian Zhao. 2019. "High-Efficiency Millimeter-Wave CMOS Switching Rectifiers: Theory and Implementation." IEEE Transactions on Microwave Theory and Techniques 67, no. 12: 5171-5180.
In this article, a geometric method, along with the concept of the reference circle, is proposed for the analysis of reflective-type phase shifter (RTPS). Comprehensive analyses of popular reflective loads, including capacitive load (CL), resonated load (RL), and π -type load, are presented, revealing their limitations. The triple-resonating load technique is proposed to accomplish a full 360° phase shift range and suppress the loss variation. Further, a systematic design methodology for the RTPS using triple-resonating load is developed. Fabricated in 65-nm CMOS technology, the proposed RTPS occupies a core chip area of 0.076 μm². It achieves the first-ever 379° phase shift range at 29 GHz with only one control voltage. With dual-voltage control, a full 360° phase shift range with 8.3 ± 0.2 dB insertion loss is achieved. For both control methods, the return loss is better than 22.8 dB for all phase shift states.
Peng Gu; Dixian Zhao. Geometric Analysis and Systematic Design of a Reflective-Type Phase Shifter With Full 360° Phase Shift Range and Minimal Loss Variation. IEEE Transactions on Microwave Theory and Techniques 2019, 67, 4156 -4166.
AMA StylePeng Gu, Dixian Zhao. Geometric Analysis and Systematic Design of a Reflective-Type Phase Shifter With Full 360° Phase Shift Range and Minimal Loss Variation. IEEE Transactions on Microwave Theory and Techniques. 2019; 67 (10):4156-4166.
Chicago/Turabian StylePeng Gu; Dixian Zhao. 2019. "Geometric Analysis and Systematic Design of a Reflective-Type Phase Shifter With Full 360° Phase Shift Range and Minimal Loss Variation." IEEE Transactions on Microwave Theory and Techniques 67, no. 10: 4156-4166.
Mengru Yang; Bingyang Wu; Dixian Zhao. A Ka-Band Compact Active Switch With Broadband Amplifiers for Phased-Array Transceiver in 65-nm CMOS. IEEE Solid-State Circuits Letters 2019, 2, 33 -36.
AMA StyleMengru Yang, Bingyang Wu, Dixian Zhao. A Ka-Band Compact Active Switch With Broadband Amplifiers for Phased-Array Transceiver in 65-nm CMOS. IEEE Solid-State Circuits Letters. 2019; 2 (5):33-36.
Chicago/Turabian StyleMengru Yang; Bingyang Wu; Dixian Zhao. 2019. "A Ka-Band Compact Active Switch With Broadband Amplifiers for Phased-Array Transceiver in 65-nm CMOS." IEEE Solid-State Circuits Letters 2, no. 5: 33-36.
This Letter reports a 25.80–30.84 GHz wideband millimetre-wave VCO in 65-nm CMOS technology. A 4-bit binary-weighted capacitor bank is used to extend the tuning range. The PMOS current source, as well as the LC noise filtering network, are used to improve the phase-noise performance. Occupying a core area of 0.056 mm2, the implemented VCO core consumes 4.1 mW at a 1 V supply. At 26 GHz, it achieves a phase noise of −102.8 dBc/Hz at 1 MHz offset.
Tianao Ding; Xiangning Fan; Dixian Zhao. Ka‐band wideband VCO with LC filtering technique in 65‐nm CMOS. Electronics Letters 2019, 55, 581 -583.
AMA StyleTianao Ding, Xiangning Fan, Dixian Zhao. Ka‐band wideband VCO with LC filtering technique in 65‐nm CMOS. Electronics Letters. 2019; 55 (10):581-583.
Chicago/Turabian StyleTianao Ding; Xiangning Fan; Dixian Zhao. 2019. "Ka‐band wideband VCO with LC filtering technique in 65‐nm CMOS." Electronics Letters 55, no. 10: 581-583.
Yan Li; Donald Y. C. Lie; Chaojiang Li; Dixian Zhao; Christian Fager. RF Front-End Circuits and Architectures for IoT/LTE-A/5G Connectivity. Wireless Communications and Mobile Computing 2018, 2018, 1 -2.
AMA StyleYan Li, Donald Y. C. Lie, Chaojiang Li, Dixian Zhao, Christian Fager. RF Front-End Circuits and Architectures for IoT/LTE-A/5G Connectivity. Wireless Communications and Mobile Computing. 2018; 2018 ():1-2.
Chicago/Turabian StyleYan Li; Donald Y. C. Lie; Chaojiang Li; Dixian Zhao; Christian Fager. 2018. "RF Front-End Circuits and Architectures for IoT/LTE-A/5G Connectivity." Wireless Communications and Mobile Computing 2018, no. : 1-2.
This paper describes a high-speed CORDIC-based digital outphasing modulator. Fixed-point Matlab model of the outphasing modulator is developed to evaluate the system performance and define the circuit design parameters. Design issues such as signal quantization error, delay mismatch, and phase overflowing are addressed to enable hardware implementation. The complete outphasing modulator is fully custom designed in 40 nm CMOS, which can be integrated in a millimeter-wave outphasing transmitter to enhance the system average efficiency. Tested with 10.56 Gb/s 64-QAM, this work achieves an EVM of 3.2% and fulfils the IEEE 802.11ad spectral mask requirements.
Dixian Zhao; Pingyang He. CORDIC-Based Multi-Gb/s Digital Outphasing Modulator for Highly Efficient Millimeter-Wave Transmitters. Wireless Communications and Mobile Computing 2018, 2018, 1 -6.
AMA StyleDixian Zhao, Pingyang He. CORDIC-Based Multi-Gb/s Digital Outphasing Modulator for Highly Efficient Millimeter-Wave Transmitters. Wireless Communications and Mobile Computing. 2018; 2018 ():1-6.
Chicago/Turabian StyleDixian Zhao; Pingyang He. 2018. "CORDIC-Based Multi-Gb/s Digital Outphasing Modulator for Highly Efficient Millimeter-Wave Transmitters." Wireless Communications and Mobile Computing 2018, no. : 1-6.
This paper describes a fully integrated power amplifier (PA) in 100 nm InGaAs pHEMT process for E-band point-to-point communications. The device size and biasing conditions are optimized to enhance the overall performance at millimeter-wave frequencies. The complete PA consists of two unit PAs and each unit PA has four stages to improve the gain while ensuring stability from dc to the operating frequencies. A 4-way zero-degree combiner (in the unit PA) and a 2-way λ/2 combiner are used to boost the output power. Occupying 5 mm2, the proposed PA achieves an output power of 0.45 W with 17.9% PAE at 74 GHz.
Dixian Zhao; Yongran Yi. A 0.45 W 18% PAE E-Band Power Amplifier in 100 nm InGaAs pHEMT Technology. Wireless Communications and Mobile Computing 2018, 2018, 1 -6.
AMA StyleDixian Zhao, Yongran Yi. A 0.45 W 18% PAE E-Band Power Amplifier in 100 nm InGaAs pHEMT Technology. Wireless Communications and Mobile Computing. 2018; 2018 ():1-6.
Chicago/Turabian StyleDixian Zhao; Yongran Yi. 2018. "A 0.45 W 18% PAE E-Band Power Amplifier in 100 nm InGaAs pHEMT Technology." Wireless Communications and Mobile Computing 2018, no. : 1-6.