Floating-gate MOS transistors have been widely used in diverse analog and digital applications. One of these is as a charge sensitive device in sensors for pH measurement in solutions or using gates with metals like Pd or Pt for hydrogen sensing. Efforts are being made to monolithically integrate sensors together with controlling and signal processing electronics using standard technologies. This can be achieved with the demonstrated compatibility between available CMOS technology and MEMS technology. In this paper an in-depth analysis is done regarding the reliability of floating-gate MOS transistors when charge produced by a chemical reaction between metallic oxide thin films with either reducing or oxidizing gases is present. These chemical reactions need temperatures around 200 °C or higher to take place, so thermal insulation of the sensing area must be assured for appropriate operation of the electronics at room temperature. The operation principle of the proposal here presented is confirmed by connecting the gate of a conventional MOS transistor in series with a Fe₂O₃ layer. It is shown that an electrochemical potential is present on the ferrite layer when reacting with propane.

This paper introduces a proposal for a wireless network of smart sensors designed to capture the vibrations produced by the impact of a person’s footsteps on a dispersive and damped floor. These vibrations are utilized to pinpoint the location of impacts using a heuristic algorithm, enabling operation at a low data transmission/reception rate. Traditionally, the placement of sensors within a room has not been given significant consideration in the context of localization; however, our findings indicate that a detailed analysis of both the number and location of sensors can substantially enhance the accuracy of footstep localization. In this study, we have optimized the arrangement and quantity of sensors through the application of bio-inspired metaheuristics, aiming to minimize localization errors across the room. Upon evaluating various bio-inspired metaheuristic optimization algorithms, we identified the one that yielded the lowest estimation errors for the room as a whole. Our experimental tests demonstrate that such optimization significantly enhances the efficacy of the localization algorithm, resulting in a reduction of localization error ranging from 18.24% to 46.78% across different trajectories.

Cryptographic algorithms (RSA, DSA, and ECC) use modular exponentiation as part of the principal operation. However, Non-profiled Side Channel Attacks such as Simple Power Analysis and Differential Power Analysis compromise cryptographic algorithms that use such operation. In this work, we present a modification of a modular exponentiation algorithm implemented in programmable devices, such as the Field Programmable Gate Array, for which we use Virtex-6 and Artix-7 evaluation boards. It is shown that this proposal is not vulnerable to the attacks mentioned previously. Further, a comparison was made with other related works, which use the same family of FPGAs. These comparisons show that this proposal not only defeats physical attack but also reduces the number of resources. For instance, the present work reduces the Look-Up Tables by 3550 and the number of Flip-Flops was decreased by 62,583 compared with other works. Besides, the number of memory blocks used is zero in the present work, in contrast with others that use a large number of blocks. Finally, the clock cycles (latency) are compared in different programmable devices to perform operations.

This work deals with the presentation of a spiking neural network as a means for efficiently solving the reduction of dimensionality of data in a nonlinear manner. The underneath neural model, which can be integrated as neuromorphic hardware, becomes suitable for intelligent processing in edge computing within Internet of Things systems. In this sense, to achieve a meaningful performance with a low complexity one-layer spiking neural network, the training phase uses the metaheuristic Artificial Bee Colony algorithm with an objective function from the principals in the machine learning science, namely, the modified Stochastic Neighbor Embedding algorithm. To demonstrate this fact, complex benchmark data were used and the results were compared with those generated by a reference network with continuous-sigmoid neurons. The goal of this work is to demonstrate via numerical experiments another method for training spiking neural networks, where the used optimizer comes from metaheuristics. Therefore, the key issue is defining the objective function, which can relate optimally the information at both sides of the spiking neural network. Certainly, machine learning techniques have advanced in defining efficient loss functions that can become suitable objective function candidates in the metaheuristic training phase. The practicality of these ideas is shown in this article. We use MSE values for evaluating the relative quality of the results and also co-ranking matrices.

The ubiquitous classification task is a computing process within current machine learning frameworks, which are based on neural networks. These neural systems are trained using datasets created from technical, scientific or engineering applications, with excellent outcomes. This is because the associated training algorithms are variants of the gradient descending optimization procedure e.g. Adam or Adamax, that cope with local minima; however, they are computationally complex. The Extreme Learning Machine (ELM) neural model relaxes this numerical issue by computing Moore-Penrose matrices as a training method with acceptable performance values. In this context, Field Programmable Gate Array (FPGA) accelerators have been developed for this type of matrices, which include special-purpose cores. Considering the present work, it introduces the standard Widrow-Hoff neural training rule as the key process to compute efficiently Moore-Penrose matrices in classification tasks using the ELM model. Moreover, the use of the vectorial form instead of the matrixial representation for this training rule reduces the hardware resources in the used FPGA, leading to a low-cost system, whose performance in terms of time and accuracy is suitable for moderate matrix sizes in diverse classification problems. To prove this, six datasets from real-world applications were used, i.e. diabetes, cancer, sonar, ionosphere, wine and vehicle, which serve very often as benchmarks in machine learning research. Therefore, the innovation of this work is the use of a neural learning rule for computing Moore-Penrose matrices with a generic FPGA, with three meaningful features as follows. (1) this technique reduces substantially the usage of numerical resources in the FPGA, (2) the used hardware framework is based on standard development prototyping boards, reducing cost and, (3) although the learning algorithm in this FPGA trains in a stochastic manner, the chosen learning rate reduces this effect without affecting convergence velocity.