In this paper, we report a high-performance enhancement-mode GaN HEMT fabricated on high-quality ultrathin buffer, which achieved by a two-step-graded (TSG) transition structure on high-resistivity (HR) silicon substrate. Owing to rapid dislocation annihilation of TSG transition structure, the ultrathin buffer exhibits a low total dislocation density (TDD) of 1.7×10 9 cm -2 , which could make a contribution to the improvement of current and RF power performance. As a result, an E-mode GaN HEMT fabricated on this structure presents a maximum drain current of 620 mA/mm, a threshold voltage ( V th ) of 0.7 V, and a transconductance of 360 mS/mm. Furthermore, load-pull measurements yield a maximum output power density ( P out ) of 5.32 W/mm at 3.6 GHz and V DS = 35V in pulse mode, which represents the top level for E-mode GaN-on-Si devices reported to date. The high-quality GaN epitaxy and splendid E-mode HEMT shown in this work reveal great potential for GaN-on-Si RF applications.
15 August 2025 in IEEE Transactions on Electron Devices
In this article, an innovative layered GaN buffer is proposed. The upper layer is low-concentration C-doped, and the lower layer is the Fe-doped GaN buffer layer used in AlGaN/GaN high electronic mobility transistors (HEMTs). While suppressing the Fe doping tail, the breakdown voltage of the GaN HEMT is increased from 128 to 174 V. Because of the suppression of the Fe-doped tail, the mobility and transconductance ($\text {g}_{m}\text {)}$ were also significantly improved. The C-doped concentration of ${5}\times {10}^{{16}}$ /cm3 does not significantly worsen the current collapse (CC) of the GaN HEMTs. The CC of C/Fe-doped GaN HEMTs is 3% at the (−3.5, 20) V. The increase in $\text {g}_{m}$ results in a higher current gain cut-off frequency (${f}_{T}\text {)}$ and the maximum oscillation frequency (${f}_{\max }\text {)}$ . The C/Fe-doped buffer GaN HEMTs exhibit high performance in the RF load-pull of 12 GHz. The 24.1 W/mm of output power density and 57% of power-added efficiency (PAE) are realized at 80 V of drain voltage. This can provide a new idea for the buffer layer of high RF power GaN HEMTs.
To enhance the RF power properties of CMOS-compatible gold-free GaN devices, this work introduces a kind of GaN-on-Si HEMT with a low parasitic regrown ohmic contact technology. Attributed to the highly doped n+ InGaN regrown layer and smooth morphology of gold-free ohmic stacks, the lowest ohmic contact resistance (Rc) was presented as 0.072 Ω·mm. More importantly, low RF loss and low total dislocation density (TDD) of the Si-based GaN epitaxy were achieved by a designed two-step-graded (TSG) transition structure for the use of scaling-down devices in high-frequency applications. Finally, the fabricated GaN HEMTs on the Si substrate presented a maximum drain current (Idrain) of 1206 mA/mm, a peak transconductance (Gm) of 391 mS/mm, and a breakdown voltage (VBR) of 169 V. The outstanding material and DC performances strongly encourage a maximum output power density (Pout) of 10.2 W/mm at 8 GHz and drain voltage (Vdrain) of 50 V in active pulse mode, which, to our best knowledge, updates the highest power level for gold-free GaN devices on Si substrates. The power results reflect the reliable potential of low parasitic regrown ohmic contact technology for future large-scale CMOS-integrated circuits in RF applications.
27 April 2026 in IEEE Transactions on Electron Devices
In this article, we introduce a new analytical model for determining the threshold voltage (${V} {_{\text {TH}}}$ ) in charge-trap-based hybrid gate-stack enhancement-mode (E-mode) AlGaN/GaN MIS-high electron mobility transistors (HEMTs). The ${V} {_{\text {TH}}}$ expression is derived by simultaneously solving the potential balance and interfacial Gauss equations based on band and charge distribution analyses, with the stored charge in the charge-trapping layer (CTL) evaluated considering both Wentzel–Kramers–Brillouin (WKB)-based tunneling and thermally activated emission probabilities. The model examines how ${V} {_{\text {TH}}}$ depends on structural parameters across three CTL thickness regimes: thin, where CTL thickness has minimal effect, but the blocking layer thickness dominates; intermediate, where both CTL thickness and trapped charge influence ${V} {_{\text {TH}}}$ ; and thick, where trapped charge is negligible and ${V} {_{\text {TH}}}$ decreases linearly with increasing CTL thickness. The model’s accuracy was validated by TCAD simulation, and the dependence of ${V} {_{\text {TH}}}$ on various initialization voltages and temperature was analyzed. The results offer valuable guidance for optimizing the structure and designing charge-trap-based hybrid gate-stack E-mode GaN MIS-HEMTs.
8 May 2026 in IEEE Transactions on Electron Devices
In this article, a fully vertical $\beta $ -Ga2O3 heterojunction barrier Schottky (HJBS) diode utilizing a sputtered p-gallium nitride (GaN) layer is reported. The device exhibits a high destructive breakdown voltage (BV) of 4335V, a turn-on voltage (${V}_{\textit {on}}\text {)}$ of 0.8V, and a specific on-resistance (${R}_{\textit {on},\textit {sp}}\text {)}$ of 6.79m$\Omega \cdot $ cm2, resulting in an outstanding Baliga’s figure of merit (BFOM) of 2.77GW/cm2. This high performance is primarily attributed to the effective electric-field modulation introduced by the p-GaN layer beneath the anode, which suppresses peak electric-field crowding and significantly delays the onset of breakdown. To further validate the material quality and structural integrity of the sputtered p-GaN layer, comprehensive characterization using scanning transmission electron microscopy (STEM), X-ray diffraction (XRD), and transmission electron microscopy (TEM) was conducted, demonstrating a dense morphology and well-oriented crystalline structure. These results confirm that sputtering is a viable and promising approach for integrating p-GaN, which is particularly important in the absence of effective p-type doping technology in $\beta $ -Ga2O3. Furthermore, temperature-dependent–current–voltage ($I$ –$V$ –${T}\text {)}$ measurements were carried out to investigate the reverse leakage transport mechanisms. It was found that in the low reverse voltage range (−1to −20V), the Poole–Frenkel (PF) emission dominates, with a trap barrier height (${q}\phi _{t}\text {)}$ of 0.74eV. With increasing reverse bias (−20to −200V), the dominant transport mechanism transitions to 3-D Mott variable-range hopping (3-D Mott–VRH).