Common-mode voltage (CMV) problem brings severe negative effects in three-phase voltage source inverters (VSIs), particularly for high frequency Silicon Carbide (SiC) VSIs. However, most traditional CMV reduction strategies, which are studied based on Silicon VSIs, are hard to be implemented and sacrifice the other performance of the VSIs. To overcome such drawbacks, this paper proposes a novel generalized tri-state pulse width modulation (GTSPWM) for high frequency SiC VSIs over power factor of 0-1 and whole linear modulation index range. The working principle of conventional space vector based reduced CMV PWM (RCMV-PWM) methods are reviewed, and their switching signals and CMV patterns are illustrated. The proposed GTSPWM method is described in generalized scalar PWM approach for simple application and compared with other RCMV-PWM methods. Mathematical analysis, simulations, and experimental results have been used to verify that GTSPWM based high frequency SiC VSIs can achieve minimum switching losses, improved output waveform quality, smaller DC-link current ripples, and reduced CMV characteristics. Moreover, with the usage of GTSPWM method, the switching frequency of SiC VSIs can be further increased, and the performance of high frequency SiC VSIs could be improved appreciably.

Active damping (AD) is a popular approach to suppress the resonance in LCL filtered grid-connected inverter (GCI) owing to lossless damping and efficient system design. In capacitor voltage (CV) damping methods, a differential compensator is essentially needed in feedback path where the damping effectiveness depends on emulated derivative characteristics of the compensator. Such capacitor voltage feedback compensation (CVFC) methods face design limitation at the critical resonance frequency and may require additional delay reduction to ensure stability. In this paper, an alternative parallel feedforward compensation (PFC) method is proposed to synthesize an almost strictly positive real (ASPR) plant and achieved damping with modified stability characteristics. A second-order bandpass section (BPS) employed as a compensator in damping loop based on the proposed control scheme. The main features of the proposed method are effective damping without critical resonance frequency damping limit, extended stable damping region, improved control performance and good robustness under filter parameters and grid inductance variation conditions. The simulation and experimental results are presented to verify the effectiveness of the proposed method.

A medium‐voltage high‐power electric traction system, due to its non‐linear nature results in serious power quality issues in power system such as low‐power factor and high‐harmonic distortion. To mitigate the aforementioned problems, this study presents a seven‐level asymmetrical hybrid multilevel converter that can be implemented using a single dc source and two capacitors . The proposed converter is a series connection of a five‐level cascaded module (CM) converter with an H‐bridge cell to meet the demand of medium‐voltage high‐power traction applications with improved power factor at minimum harmonic distortion. A modulation scheme presented will operate an H‐bridge cell and a CM with a fundamental frequency and high‐frequency switching, respectively. The unbalancing of dc‐link capacitors voltages due to active power transfer requires corrective control action including current control, voltage control and voltage balancing that has been proposed to keep the dc‐link capacitor voltage balanced. Working principle of the proposed topology and its mathematical analysis is presented in this work. The effectiveness of the controlled pulse‐width modulation strategy and stability of the proposed control method have been validated through simulation and experimental results.

The LCL topology (formed by an LC tank with a transmitting coil) is extensively utilized in wireless power transfer (WPT) systems with the features of a constant resonant current and ability to disconnect load abruptly. However, it requires high input voltage, which limits its utilization in battery powering scenarios (12~24 V). A current-fed inverter (CFI) is applied to the LCL-S (a compensation capacitor in series with the receiving coil) WPT systems to boost the input voltage, thereby getting a higher resonant current in the transmitting side (Tx). To facilitate the voltage regulation in the receiving side (Rx), a semi-active bridge (SAB) is introduced into the system, which further boosts the output voltage by a lower frequency switching at different duty ratios. Rigorous mathematical analysis of the proposed system is carried out and design guidelines are subsequently derived. Moreover, a power loss reduction is realized by zero voltage switch (ZVS) of the four switches in the Tx which are deduced and presented. Simulations and experiments are added to verify the proposed system. Consequently, a 93.3% system efficiency (DC-to-DC efficiency) is obtained using the proposed topology. Optimization techniques for a higher efficiency are included in this study.

Dead time between the complementary driving signals is needed to avoid short circuit in voltage source inverters (VSIs), however, this raises issues such as voltage distortion and harmonic generation. In wireless power transfer (WPT) systems, the ratio of dead time versus operating period becomes more problematic due to the high frequency, where the dead time can cause serious concerns regarding the phase errors and control performance deterioration. Therefore, this paper presents a comprehensive analysis of the dead-time effect for WPT systems based on a series–series (SS) topology. Firstly, it is found that voltage distortion appears in two regions in comparison with the three in one active bridge WPT system, and seven regions, as compared to the eight in dual active bridge (DAB) WPT system. Afterwards, a novel pulse width modulation (PWM) method is proposed, where the driving signals of the same phase leg are no longer complementary to each other. By employing the proposed method, the dead-time effect can be addressed up to a certain extent, and the desired voltage can be obtained in all the regions. In addition, the proposed method is not influenced by the system parameters, and can be easily applied to other high-frequency resonant converters. Simulated and experimental results are added to verify the feasibility and efficacy of the proposed control scheme.

Electrical Power quality in distribution systems is crucial to both utility and consumers simultaneously. The main issue that affects the quality factor of electrical distribution systems is phase load imbalance. Phase imbalance is a major issue in distribution networks in Pakistan, India, the United States, China, and other nations and regions. The distribution system in Pakistan is normally a three-phase, four-wire system, whereas our residential and commercial loads are often single-phase, resulting in an unbalanced system. These unbalanced circumstances in the system result in single-phasing, overloading, and overheating situations, and the return of current to neutral, as well as increased power system investment and operational expenses. In this paper, several methodologies for phase balance are being studied. After researching several techniques of phase balancing and building on that methodology, a simulation prototype is developed, and different unbalanced situations are studied. To analyze unbalanced conditions in practical mode, a hardware prototype is developed on the basis of simulation. Examined some unbalanced loads on the simulation prototype and then on the hardware prototype and achieved the best possible load balancing on phases.