Md Omar Faruque

Mr. Md Omar Faruque

orcid

Research Focus & Metrics

Academic Career Length

8Years (2019-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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2 December 2025 in Electronics
Verified
Journal Article
Open access
PDF file
MFMd Omar Faruque
Md Omar Faruque
PJPeter Jamieson
Peter Jamieson
APAhmad Patooghy
Ahmad Patooghy
ABAbdel-Hameed Badawy
Abdel-Hameed Badawy
Traditionally, inserting realistic Hardware Trojans (HTs) in complex hardware systems has been a time-consuming manual process, requiring comprehensive knowledge of the design and navigating intricate Hardware Description Language (HDL) codebases. Machine Learning (ML)-based approaches have attempted to automate this process but often struggle with the need for extensive training data, learning time, and limited generalizability across diverse hardware design landscapes. This paper introduces GHOST, an automated tool that leverages Large Language Models (LLMs) for rapid generation and insertion of HT. The research encompasses both the development of the GHOST framework and a comprehensive evaluation of its effectiveness across three state-of-the-art LLMs-GPT-4, Gemini-1.5-Pro, and Llama-3-70B. According to our evaluations, GPT-4 demonstrates the best performance by successfully generating and inserting HTs in 88.9% of its attempts. This study also highlights the security risks posed by LLM-generated HTs, as 100% of successful GHOST-generated HTs that completed inference within the time limit evaded detection by a state-of-the-art ML-based HT detection tool. These results underscore the need for advanced detection and prevention mechanisms in hardware security to address the emerging threat of LLM-generated HTs.

10 January 2020
Verified
Conference Paper
Open access
SRSm Rakibul Hasan Remu
Sm Rakibul Hasan Remu
MFMd Omar Faruque
Md Omar Faruque
RFRezowan Ferdous
Rezowan Ferdous
Md Murshedul ArifeenMd Murshedul Arifeen
Md Murshedul Arifeen
SSSudman Sakib
Sudman Sakib
SRS. M. Salim Reza
S. M. Salim Reza

12 February 2026 in IEEE Access
Verified
Journal Article
Open access
MFMd Omar Faruque
Md Omar Faruque
PJPeter Jamieson
Peter Jamieson
APAhmad Patooghy
Ahmad Patooghy
ABAbdel-Hameed Badawy
Abdel-Hameed Badawy
Existing Hardware Trojan (HT) detection methods face several critical limitations: logic testing struggles with scalability and coverage for large designs, side-channel analysis requires golden reference chips, and formal verification methods suffer from state-space explosion. The emergence of Large Language Models (LLMs) offers a promising new direction for HT detection by leveraging their natural language understanding and reasoning capabilities. For the first time, this paper explores the potential of general-purpose LLMs in detecting various HTs inserted in Register Transfer Level (RTL) designs, including SRAM, AES, and UART modules. We propose a novel tool for this goal that systematically assesses state-of-the-art LLMs (GPT-4o, Gemini 1.5 Pro, and Llama 3.1) in detecting HTs without prior fine-tuning. To address potential training data bias, the tool implements perturbation techniques, i.e., variable name obfuscation, and design restructuring, that make the cases more sophisticated for the used LLMs. Our experimental evaluation demonstrates perfect HT detection rates by GPT-4o and Gemini 1.5 Pro in baseline scenarios (100%/100% precision/recall), with both models achieving better trigger line coverage (TLC: 0.82-0.98) than payload line coverage (PLC: 0.32-0.46). Under code perturbation, while Gemini 1.5 Pro maintains perfect detection performance (100%/100%), GPT-4o (100%/85.7%) and Llama 3.1 (66.7%/85.7%) show some degradation in detection rates, and all models experience decreased accuracy in localizing both triggers and payloads. This paper validates the potential of LLM approaches for hardware security applications, highlighting areas for future improvement.

1 May 2019
Verified
Conference Paper
Closed access
MFMd Omar Faruque
Md Omar Faruque
THTanvir Hasan
Tanvir Hasan
SISafayat Al Imam
Safayat Al Imam

29 June 2021
Verified
Book Chapter
Closed access
PDF file
RMRaffael Maruf
Raffael Maruf
MFMd Omar Faruque
Md Omar Faruque
GMGolam Muhtasim
Golam Muhtasim
NNNazmun Nahar Nelima
Nazmun Nahar Nelima
SMSalman Mahmood
Salman Mahmood
MRMaiun Uddin Riad
Maiun Uddin Riad

10 December 2024 in arXiv
Verified
Preprint
Open access
PDF file
MFMd Omar Faruque
Md Omar Faruque
PJPeter Jamieson
Peter Jamieson
APAhmad Patooghy
Ahmad Patooghy
ABAbdel-Hameed Badawy
Abdel-Hameed Badawy
Existing Hardware Trojans (HT) detection methods face several critical limitations: logic testing struggles with scalability and coverage for large designs, side-channel analysis requires golden reference chips, and formal verification methods suffer from state-space explosion. The emergence of Large Language Models (LLMs) offers a promising new direction for HT detection by leveraging their natural language understanding and reasoning capabilities. For the first time, this paper explores the potential of general-purpose LLMs in detecting various HTs inserted in Register Transfer Level (RTL) designs, including SRAM, AES, and UART modules. We propose a novel tool for this goal that systematically assesses state-of-the-art LLMs (GPT-4o, Gemini 1.5 pro, and Llama 3.1) in detecting HTs without prior fine-tuning. To address potential training data bias, the tool implements perturbation techniques, i.e., variable name obfuscation, and design restructuring, that make the cases more sophisticated for the used LLMs. Our experimental evaluation demonstrates perfect detection rates by GPT-4o and Gemini 1.5 pro in baseline scenarios (100%/100% precision/recall), with both models achieving better trigger line coverage (TLC: 0.82-0.98) than payload line coverage (PLC: 0.32-0.46). Under code perturbation, while Gemini 1.5 pro maintains perfect detection performance (100%/100%), GPT-4o (100%/85.7%) and Llama 3.1 (66.7%/85.7%) show some degradation in detection rates, and all models experience decreased accuracy in localizing both triggers and payloads. This paper validates the potential of LLM approaches for hardware security applications, highlighting areas for future improvement.