Accurate and efficient modeling of AlGaN/GaN HEMTs is essential for the design of next-generation power electronics. This study introduces a hybrid Auxiliary Classifier Generative Adversarial Network (ACGAN)–mixup data augmentation framework to enhance deep neural network application in AlGaN/GaN high-electron-mobility transistor modeling with limited data. Based on only 20 distinctive devices, ACGAN uses technology computer-aided design (TCAD)-calibrated data to generate high-quality synthetic drain current ($I_{ds}$) under various electronic bias conditions. The quality of the generated data is validated via Jensen–Shannon divergence with an average of 0.0341. A one-dimensional convolutional neural network (1D-CNN) predictive model is trained on augmented data and achieves stable convergence, with a mean absolute error of 0.002 A/mm for the off-state $I_{ds}$ and 0.052 A/mm for the linear region. It also shows improved robustness over the model trained on original non-augmented data. The proposed approach offers a low-cost alternative to resource-intensive TCAD simulations, enabling accurate device modeling with limited data.

Optimizing static random-access memory (SRAM) cells requires considering parasitic effects, as their impact on circuits in advanced nodes becomes increasingly complex. In this paper, Convolutional Neural Network-Informed Non-dominated Sorting Genetic Algorithms-II (CNN-Informed NSGA-II) was proposed to optimize 7 nm FinFET 6T-SRAM cells taking into account parasitic resistance. CNN-Informed NSGA-II uses a trained CNN model integrated into the conventional NSGA-II, thereby reducing its computational complexity. This approach provides a generally applicable solution that significantly improves the efficiency of circuits while balancing competitive performance metrics. Compared to the ideal (parasitic-free) 6T-SRAM cell design, the optimized 6T-SRAM cell design (considering parasitic effects) achieves a reduction of 81.60% in Write Dynamic Power and 64.65% in Write Time; HSNM and RSNM are improved by 11.92% and 6.42%, respectively. The optimized 7 nm FinFET 6T-SRAM cell structure in this paper outperforms the parasitic-free structure in terms of the performance parameters above, even when taking into account parasitic effects.