The softmax function is widely used in deep neural networks (DNNs), its hardware performance plays an important role in the training and inference of DNN accelerators. However, due to the complexity of the traditional softmax, the existing hardware architectures are resource-consuming or have low precision. In order to address the challenges, we study a base-2 softmax function in terms of its suitability for neural network training and efficient hardware implementation. Compared to the classical base- $e$ softmax function, the base-2 softmax function is a new softmax function that uses 2 as the exponential base instead of $e$ . From the aspects of mathematical derivation and software simulation, we first demonstrate the feasibility and good accuracy of the base-2 softmax function in the application of neural network training. Then, we use the symmetric-mapping lookup table (SM-LUT) method to design a low-complexity architecture but with high precision to implement it. Under TSMC 28nm CMOS technology, an example design of our architecture has the area of $5676 ~\mu m^{2}$ and the power consumption of 13.12 mW for circuit synthesis at the frequency of 3 GHz. Compared with the latest works, our architecture achieves the best performance and efficiency.

Spiking Neural Networks (SNNs) is promising to enable low power and high performance edge computing hardware design and have recently attracted attentions of researchers. Compared to Artificial Neural Networks (ANNs), SNNs, which present more realistic brain-inspired computing models, are developed as an alternative to ANNs. However, the temporal primitive of SNNs causes irregular and repeated data accesses, leading to high latency and extra power consumption. In this work, we propose an efficient architecture for SNNs by exploiting event-based characteristics. A reconfigurable spiking neuron processing unit is proposed to support a variety of spike-layers. Furthermore, to reduce the cycles needed per frame, an efficient dataflow with fast-filtering mechanism is introduced to leverage the sparsity of discrete spikes. The results show that this design achieves 67.5 $\mu \text{J}$ /image prediction energy with a throughput of 2.2K FPS. The core size is 0.89 mm ² under 28-nm technology, with 90.98% computing hardware utilization and a competitive accuracy 97.10% on a driving dataset.

We present a CORDIC (Coordinate Rotation Digital Computer)-based method to compute the logarithm function with base 2 and validate this method by software simulation and hardware implementation. Technically, we overcome the limitation of traditional hyperbolic CORDIC and transform it based on the idea of generalized hyperbolic CORDIC so that it can be used to compute log ₂ x (x ε [1, 2)). The proposed method requires only simple shift-and-add operations and has a great tradeoff between precision (or speed) and area. In MATLAB, we provide different precisions corresponding to the iterations of the transformed CORDIC for user needs. Using a pipelined structure and setting the number of iterations to be 16 (the average relative error is 2.09×10 ^-6 ), we implement an example hardware circuit. Synthesized under the SMIC 65nm CMOS technology, the circuit has an area of 24100 μm ² and computation time of 11.1 ns, which can save 31.04% area and improve 6.92% computation speed averagely compared with existing methods.

Given the scale and rapid spread of the coronavirus disease 2019 (COVID-19) caused by severe acute respiratory syndrome coronavirus 2 (SARS-CoV-2, or 2019-nCoV), there is an urgent need to identify therapeutics that are effective against COVID-19 before vaccines are available. Since the current rate of SARS-CoV-2 knowledge acquisition via traditional research methods is not sufficient to match the rapid spread of the virus, novel strategies of drug discovery for SARS-CoV-2 infection are required. Structure-based virtual screening for example relies primarily on docking scores and does not take the importance of key residues into consideration, which may lead to a significantly higher incidence rate of false-positive results. Our novel in silico approach, which overcomes these limitations, can be utilized to quickly evaluate FDA-approved drugs for repurposing and combination, as well as designing new chemical agents with therapeutic potential for COVID-19. As a result, anti-HIV or antiviral drugs (lopinavir, tenofovir disoproxil, fosamprenavir and ganciclovir), antiflu drugs (peramivir and zanamivir) and an anti-HCV drug (sofosbuvir) are predicted to bind to 3CL^Pro in SARS-CoV-2 with therapeutic potential for COVID-19 infection by our new protocol. In addition, we also propose three antidiabetic drugs (acarbose, glyburide and tolazamide) for the potential treatment of COVID-19. Finally, we apply our new virus chemogenomics knowledgebase platform with the integrated machine-learning computing algorithms to identify the potential drug combinations (e.g. remdesivir+chloroquine), which are congruent with ongoing clinical trials. In addition, another 10 compounds from CAS COVID-19 antiviral candidate compounds dataset are also suggested by Molecular Complex Characterizing System with potential treatment for COVID-19. Our work provides a novel strategy for the repurposing and combinations of drugs in the market and for prediction of chemical candidates with anti-COVID-19 potential.

Softmax is a common and complex activation function in Deep Neural Networks (DNN). However, it is a challenge to apply it efficiently in DNN training hardware accelerator. Therefore, we propose a high precision calculation method and architecture based on base- $2$ softmax, which has low hardware complexity than base- $e$ softmax but can still be useful in DNN training. First, we simplify the hardware implementation complexity of calculating base- $2$ softmax. Second, we use the base-TEXPRESERVE4 hyperbolic COordinate Rotation Digital Computer (CORDIC) to implement the core computation. Finally, we show that the proposed method can be used in DNN training through experiments. Moreover, with the same order of the magnitude of high precision, our hardware cost is lower than traditional base- $e$ softmax or other alternative design methods. Under TSMC 28nm CMOS technology, an example design of our architecture has the area of $98787.43\mu m^2$ and the power consumption of $24.72$ mW for circuit synthesis at the frequency of 1GHz.

We propose a new method and hardware architecture to compute the functions expressed as $X^{Y}$ ( $X$ and $Y$ are arbitrary floating-point numbers), which can support arbitrary Nth root, exponential and power operations. Because of the complexity of direct computation, we usually convert it to logarithm, multiplication, and antilogarithm operations. Traditional approaches suffer from long latency, large area and high power consumption. To solve this problem, we propose a symmetric-mapping lookup table (SM-LUT) to be capable of computing $\log _{2}x$ ( $x\in [{1, 2}]$ ) and $2^{x}$ ( $x\in [{0, 1}]$ ) simultaneously. It lays the foundation for computing $X^{Y}$ . To further improve hardware performance of our architecture, we propose a multi-region address searcher to speed up the calculation of SM-LUT. In addition, we use an optimized Vedic multiplier to shorten the critical path and improve the efficiency of multiplication, which is included in computing $X^{Y}$ . Under the TSMC 40nm CMOS technology, we design and synthesize a reference circuit to compute $X^{Y}$ with a maximum relative error of 10 ⁻³ . The report shows that the reference circuit achieves the area of $14338.50~\mu \text {m}^{2}$ and the power consumption of 4.59 mW at the frequency of 1 GHz. In comparison with the state-of-the-art work under the same input range and similar precision, it saves 78.57% area and 80.42% power consumption for $\sqrt [N]{R}$ computation and 82.89% area and 81.89% power consumption for $R^{N}$ computation averagely. On top of that, our architecture reduces the computation latency by 62.77% averagely and has one more order of magnitude of energy efficiency than others.