Anwar Jarndal

Prof. Anwar Jarndal

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Research Focus & Metrics

Academic Career Length

22Years (2005-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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7 November 2005 in IEEE Transactions on Microwave Theory and Techniques
Verified
Journal Article
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Anwar JarndalAnwar Jarndal
Anwar Jarndal
GKG. Kompa
G. Kompa
A new small-signal modeling approach applied to GaN-based devices is presented. In this approach, a new method for extracting the parasitic elements of the GaN device is developed. This method is based on two steps, which are: 1) using cold S-parameter measurements, high-quality starting values for the extrinsic parameters that would place the extraction close to the global minimum of the objective function for the distributed equivalent circuit model are generated and 2) the optimal model parameter values are searched through optimization using the starting values already obtained. The bias-dependent intrinsic parameter extraction procedure is improved for optimal extraction. The validity of the developed modeling approach and the proposed small-signal model is verified by comparing the simulated wide-band small-signal S-parameter, over a wide bias range, with measured data of a 0.5-/spl mu/m GaN high electron-mobility transistor with a 2/spl times/50 /spl mu/m gatewidth.

29 October 2007 in IEEE Transactions on Electron Devices
Verified
Journal Article
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Anwar JarndalAnwar Jarndal
Anwar Jarndal
GKGünter Kompa
Günter Kompa
In this paper, an accurate table-based large-signal model for AlGaN/GaN HEMTs accounting for trapping- and self-heating-induced current dispersion is presented. The B-spline-approximation technique is used for the model-element construction, which improves the intermodulation-distortion (IMD) simulation. The dynamic behavior of the trapping and self-heating processes is taken into account in the implementation of the model. The model validity is verified by comparing the simulated and measured outputs of the device tested under pulsed and continuous large-signal excitations for devices of 1-mm gate width. Single- and two-tone simulation results show that the model can efficiently predict the output power and its harmonics and the associated IMD under different input-power and bias conditions.

6 January 2011 in IEEE Transactions on Microwave Theory and Techniques
Verified
Journal Article
Closed access
Anwar JarndalAnwar Jarndal
Anwar Jarndal
AMAsdesach Z. Markos
Asdesach Z. Markos
GKGünter Kompa
Günter Kompa
An improved large-signal modeling approach of GaN on Si devices for RF high-power applications is presented. This approach accounts for the parasitic buffer loading effect under microwave RF operation in addition to the self-heating and trap ping effects associated with high-power operation conditions. A hybrid optimization (genetic and Simplex) technique based procedure is used to determine the optimal values of the model extrinsic elements. These elements are de-embedded from multibias S-parameter measurements to find the intrinsic part of the device, which is then used to construct a nonlinear current-charge (represented by nonlinear charge and current sources) based model for the gate current of the device. Pulsed and static dc IV characteristics are used for modeling of the drain current. The validity of the developed modeling approach is verified by comparing simulated large-signal single- and two-tone simulation with measured data of a 2-mm (10 × 200 μm) GaN HEMT on Si substrate. The model has been employed for designing a class-AB power amplifier. Very good agreement between the amplifier simulation and measurement shows the validity of the model.

23 July 2015 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Journal Article
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Anwar JarndalAnwar Jarndal
Anwar Jarndal
RERiadh Essaadali
Riadh Essaadali
AKAmmar B. Kouki
Ammar B. Kouki
In this paper, a reliable small-signal model parameter extraction method for GaN high electron mobility transistor (HEMT) on Si substrate has been developed and validated with respect to different gate width devices. The main advantage of this approach is its accuracy and dependency on only pinched-off and unbiased S-parameter measurements. The developed procedure shows reliable and physically relevant results for the investigated devices and scaled with the gate width. A very good agreement is obtained between small-and large-signal simulations and measurements of the considered GaN HEMTs.

11 May 2020 in IEEE Transactions on Microwave Theory and Techniques
Verified
Journal Article
Closed access
XDXuekun Du
Xuekun Du
MHMohamed Helaoui
Mohamed Helaoui
Anwar JarndalAnwar Jarndal
Anwar Jarndal
TLTaijun Liu
Taijun Liu
BHBiao Hu
Biao Hu
FGFadhel M. Ghannouchi
Fadhel M. Ghannouchi
In this article, an artificial neural network (ANN)-based large-signal model (LSM) of AlGaN/GaN high electron mobility transistors (HEMTs) with accurate buffer-related trapping effects characterization and modeling is proposed. A hybrid small-signal parameter-extraction method for AlGaN/GaN HEMTs is used to acquire the parasitic parameters. To simplify the modeling procedure of the drain-source current Ids, an ANN-based model associated with the empirical equations taking into account the trapping effects, self-heating effects, and breakdown issue is developed. The low-frequency dispersions related to the buffer-related trapping effects have been well modeled by using a new empirical equation, which has been verified by small-signal S-parameters. Also, a new thermal factor KT and an improved Shockley diode equation are given in the proposed model as well. The developed LSM has been fully verified by a 2 × 100 μm AlGaN/GaN HEMT with the pulsed I-V, small-signal S-parameters, power sweep, and load-pull measurements.

30 May 2006 in IEEE Microwave and Wireless Components Letters
Verified
Journal Article
Closed access
Anwar JarndalAnwar Jarndal
Anwar Jarndal
GKG. Kompa
G. Kompa
The validity of the proposed small-signal model (SSM) and the developed extraction method in for large GaN devices is investigated. Extraction of parasitic elements is performed for different size devices to show the scaling of these elements with the gate width. The model shows a very good result for describing the parasitic distributed effect, which is considerable for large devices.