Accurate and efficient defect detection in printed circuit boards (PCBs) is critical for manufacturing quality control. Existing methods predominantly rely on manually extracted features such as surface texture, color, and shape for defect recognition and classification within small-dimensional feature datasets. A convolutional neural network (CNN) model was developed via transfer learning. Feature extraction involves diverse operations across different CNN layers. Essential features were selected, and dimensionality was reduced via either t-distributed stochastic neighbor embedding (t-SNE) or principal component analysis (PCA). Defect classification was subsequently performed by clustering the reduced features with either the K-means or K-nearest neighbors (KNN) algorithm. Compared with alternative model feature learning classifiers, the proposed small-dimensional CNN model performs significantly better. A defect recognition accuracy of 97.33% was achieved, with processing completed in approximately 60 s. This approach, which integrates transfer learning-based CNN feature extraction with dimensionality reduction and clustering techniques, provides a fast and effective method for high-precision defect detection and classification in PCBs.

This study introduces a dual enhancement mechanism integrating Deformable Convolution v4 (DCNv4) and an Asymmetric Decoupled Detection Head (AsDDet) to significantly improve the detection performance of small objects in high-altitude unmanned aerial vehicle (UAV) imagery using YOLOv11 model architecture. We embedded DCNv4 into YOLOv11 and redesigned its operational modality to establish an efficient and dynamic sparse operator while optimizing memory access processes. This integration enhances both the operational efficiency and overall performance. Furthermore, AsDDet, an efficient and innovative technique, employs an asymmetric dual-branch structure to decouple the classification and regression tasks. This allows the application of distinct convolutional layers tailored to process the positional and complex shape data characteristics of small objects. This dual-improvement design enables the model to accommodate the diverse demands of detection tasks better, thereby increasing the overall detection accuracy. An experimental validation was conducted using a dataset of urban appearance violations, which demonstrated significant improvements in precision, recall, and mean average precision (mAP). Specifically, the precision increased from 2.50% to 84.0%, recall improved from 3.94% to 81.3%, and mAP@0.5, and mAP@0.5:0.95, increased from 2.62% and 4.08% to 87.8% and 61.2%, respectively. Compared with the original YOLOv11 model and other mainstream object detection models, the proposed method exhibited marked enhancements in detection precision, recall, and mAP while effectively reducing both false negatives and false positives. The experimental results substantiate the significant performance gains achieved in UAV-based small-object detection, offering a novel solution for addressing related challenges in the field.

In semiconductor manufacturing, automated wafer defect detection is critical for ensuring chip yield and process stability. In seismically active regions, sub-millimeter conveyor micro-displacements during seismic events can produce complex geometric anomalies on wafer surfaces, and the resulting need for rapid post-event inspection motivates the present work. Conventional convolutional neural networks (CNNs) face inherent limitations in capturing global spatial context and suffer from computational redundancy when processing micro-scale, multi-morphological defects. To address these challenges, this study proposes an improved YOLOv11 framework integrating three enhancements: an attention-based intra-scale feature interaction (AIFI) module at the backbone–neck interface to strengthen global semantic correlations, a lightweight asymmetric detection head (LADH) to decouple classification and localization tasks, and a geometry-aware SIoU loss to constrain bounding box regression from angular, distance, and shape perspectives. Experiments on a public benchmark of industrial wafer maps demonstrate that the proposed method improves mAP50 from 93.0% to 94.5% while maintaining 181.7 FPS on a desktop-class GPU. These results demonstrate the effectiveness of the proposed framework for high-throughput wafer-defect inspection on desktop-class hardware, and its low parameter count makes it a promising candidate for future deployment on resource-constrained edge devices.