Resistive random-access memory (ReRAM)-based crossbar array (RCA) is a promising platform to accelerate vector-matrix multiplication in deep neural networks (DNNs). There are, however, some practical issues, especially device variation, that hinder the versatile development of ReRAM in neural computing systems. The device variations include device-to-device variation (DDV) and cycle-to-cycle variation (CCV) that deviate the devise resistance in the RCA from their target state. Such resistance deviation seriously degrades the inference accuracy of DNNs. To address this issue, we propose a software-hardware compensation solution that includes compensation training based on scale factors (CTSF) and variation-aware compensation training based on scale factors (VACTSF) to protect the ReRAM-based DNN accelerator against device variation. The scale factors in CTSF can be flexibly set for reducing accuracy loss due to device variation when the weights programmed into RCA are determined. For effectively handling CCV, the scale factors are introduced into the training process for obtaining variation-tolerant weights by leveraging the inherent self-healing ability of DNNs. Simulation results based on our method confirm that the accuracy losses due to device variation on LeNet-5, ResNet, and VGG16 with different datasets are less than 5% under a large device variation by CTSF. More robust weights for conquering CCV are also obtained by VACTSF. The simulation results present that our method is competitive in comparison to other variation-tolerant methods.

Magnetic skyrmions are real-space topological spin textures, which have been frequently discussed in the context of information carriers for energy-efficient and high-integration spintronic memory and computing, such as neuromorphic computing. Toward future applications in neuromorphic computing, the design of efficient and reliable on-chip skyrmion synaptic devices is a crucial requirement, which is yet to be adequately addressed. Here, we propose an on-chip skyrmion artificial synaptic device by integrating an “Ω” shaped on-chip wire with a nanodisk in the wire. By applying current pulses to the wire, the size of the skyrmion in the nanodisk could be adjusted by the generated Oersted fields. Meanwhile, the perpendicular magnetization of the nanodisk varies simultaneously, which can serve as the weight for artificial synapses. Since no current flows through the skyrmion-hosting material, current-generated local heating is avoided, and hysteresis is limited as well. As a consequence, the designed skyrmion artificial synapse allows highly linear responses. In particular, the artificial neural network based on the synapse can achieve an accuracy of more than 95% in performing the handwritten digit recognition task. This study lays a theoretical foundation for the development of highly linear skyrmion-based artificial synaptic devices, which could also be implemented for designing novel on-chip neuromorphic computing devices based on spin textures.