The conventional three-level inverter suffers the limitation of voltage buck operation. In order to give both voltage buck and boost operation capability, the quasi-Z-source three-level T-type inverter (3LT²I) has been proposed. This paper further proposes a space vector modulation (SVM) scheme for the quasi-Z-source 3LT²I to reduce the magnitude and slew rate of common-mode voltage (CMV). By properly selecting the shoot-through phase, the shoot-through states are inserted within zero vector in order not to affect the active states and output voltage. Doing so, the CMV generated by the quasi-Z-source 3LT²I is restricted within one-sixth of dc-link voltage, and voltage boosting and CMV reduction can be simultaneously realized. In addition, high dc-link voltage utilization can be maintained. The proposed scheme has been verified in both simulations and experiments. Comparisons are conducted with the conventional SVM method and the phase-shifted sinusoidal PWM method.

The conventional model predictive control (MPC) suffers from high common-mode voltage (CMV) magnitude and large current ripples. In this paper, the reduced CMV MPC strategy with double vector (RCMV-MPCDV) is proposed for three-level inverters, which adopts double vector to reduce the CMV and current ripple simultaneously in per-sampling period. Firstly, based on geometric relationship of median, a novel cost function that evaluate median line distance is proposed to reduce the computational complexity, rather than evaluating the closest distance. Secondly, in order to reduce the computational burden, the double vector preselection (DVP) algorithm is presented with fewer evaluation times. Thirdly, the candidate vectors are reclassified and regrouped from partial basic vectors, which restricts CMV magnitude within one-sixth of DC-link voltage. In addition, to select more satisfactory double vectors for RCMV-MPCDV scheme, two improved methods are proposed to compensate the losing candidate vectors. The simulation and experimental results with steady-state performance and dynamic response validate the effectiveness of the proposed method.

The improved LCL (ILCL) filter is used in transformerless three-level photovoltaic inverter system for leakage current suppression. However, the common-mode (CM) resonance circulating current (CMRCC) is generated, which causes inverter-side current oscillation, leakage current increment and system instability. To overcome these issues, an improved CM circulating current (CMCC) model with detailed analyses of CMRCC is proposed. Based on above theories, the CMRCC is influenced by filter parameters, zero-sequence duty ratio and number of switching transition. To suppress CMRCC, a hybrid control strategy composed of PI and feed-forward control is presented. It is realized by real-time adjusting zero-sequence duty ratio in space vector modulation (SVM) technique. Compared with the conventional damping resistor techniques, the CMRCC and leakage current are effectively suppressed with the proposed method. Thus, the performance of inverter-side currents and leakage current suppression are greatly improved. Besides, the capacitor-voltage-feedforward (CVF) control is adopted to eliminate resonance peak in differential-mode (DM) circuit. Simulation and experimental results are given to demonstrate the effectiveness of theoretical analyses and the proposed method.

Three-level inverter has an outstanding performance and is more advantageous in the switching vector selection than two-level inverter. In particular, the neutral-point voltage unbalance and common-mode voltage (CMV) reduction of three-level inverter should be carefully regulated for the appropriate operation, both of which, however, are mutually coupled resulting that the conventional space vector modulation (SVM) scheme cannot deal with them properly. To overcome this limitation, this paper proposes an improved space vector modulation (ISVM) technique to reduce the CMV and neutral-point voltage imbalance simultaneously. The generating mechanism of neutral-point voltage oscillation is derived. Based on the analysis, the proposed ISVM method adopts four voltage vectors (large, medium, small, and zero vectors) with adjusted dwell times to eliminate the ac unbalance of the neutral-point voltage. Considering the occurrence of neutral-point voltage disturbances, the dc neutral-point unbalance voltage is controlled by selecting the P-type or N-type small vector and adjusting the dwell times of small vectors for neutral-point voltage recovery. In addition, a novel switching sequence arrangement method with the minimal number of switches transition in one switching cycles and between switching cycles is proposed to reduce the total switching loss. Theoretical analysis and verification results show that the proposed ISVM scheme can reduce the magnitude of CMV to half of value using the conventional SVM, and an accurate control of ac and dc unbalanced neutral-point voltage can be obtained.

The conventional three-level inverter only has voltage buck capability. The quasi-Z-source three-level T-type inverter (QZS 3LT $^2$ I) has been proposed to realize voltage buck-boost operation. This paper further proposes a novel modulation scheme for the QZS 3LT $^2$ I to realize voltage boosting, reduce the common-mode voltage (CMV) and control the neutral-point voltage balance simultaneously. The proposed scheme adopts large vector, medium vector, small vector with low CMV magnitude, zero vector, and shoot-through vector to generate the output voltage. According to sector number and neutral-point voltage difference, P-type or N-type small vector with low CMV magnitude is properly selected to balance the neutral-point voltage. Shoot-through states are inserted within zero vector to boost the dc input voltage without affecting the ac output voltage. Dwell times of basic vectors are calculated through the revised volt-second balance equation. Furthermore, a coordinate control strategy between neutral-point voltage balance and voltage boosting is proposed. Doing so, the CMV magnitude can be restricted within one-sixth of dc-link voltage, and neutral-point voltage imbalance can be effectively mitigated. The effectiveness of the proposed scheme are verified by simulations and experiments.

This paper proposes a zero-sequence circulating current (ZSCC) control scheme for the multiparalleled three-level T-type inverters (3LT2Is). Based on the analysis with the proposed generalized model of multiparalleled 3LT2Is, it is seen that the ZSCC is influenced by the circuit parameters, duty cycles, and the circulating currents of the l th and first 3LT2I. To mitigate the circulating currents, a deadbeat control strategy for n-paralleled (n≥3) inverters is proposed, which is realized by adjusting the duty cycle of the small vectors in each PWM sampling period. Compared with the conventional PI control method, the ZSCC spike is mitigated with the proposed scheme, thus improving the quality of the output currents. Also, the reliability of the 3LT2Is system is improved because such a scheme only needs the information about the ZSCC and zero-sequence duty ratio in the l th and the first inverter. The proposed method can also be applied to the neutral-point-clamped converters. Simulation and experimental results verify the effectiveness of the theoretical analysis and the proposed method.