This paper reports on the fabrication, physical characterization, and non-linear modeling of 100 nm slanted-gate GaN-on-silicon HEMTs processed using a CMOS-compatible platform. This technology enables state-of-the-art DC and RF performance, with a maximum drain current density of 0.9 A/mm, a peak transconductance of 605 mS/mm, and cut-off frequencies f_T = 85 GHz and f_max = 220 GHz at V_DS = 10 V. Trapping effects investigated via conductance-versus-frequency (G–f) spectroscopy reveal two distinct interface trap populations (D_it ~ 2–3 × 10¹³ cm⁻²/eV), whose temperature-dependent dynamics deviate from the Shockley–Read–Hall model and are attributed to multiphonon emission and quantum tunneling mechanisms, respectively. An enhanced Angelov-based compact model incorporating dedicated self-heating and current-collapse sub-circuits with capacitances derived directly from measured trap densities is validated through pulsed I-V and load-pull measurements, achieving excellent agreement at 40 GHz with a saturation output power of 24 dBm and a power-added efficiency (PAE) of 51%. These results establish a promising CMOS-compatible GaN-on-Si platform for Ka-band and millimeter-wave power amplifier applications.