Zhichao Cheng

Dr. Zhichao Cheng

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Research Focus & Metrics

Academic Career Length

1Year (2026-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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19 June 2026 in Electronics
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Journal Article
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ZCZhichao Cheng
Zhichao Cheng
LSLing Sang
Ling Sang
FHFeng He
Feng He
YHYawei He
Yawei He
ZLZheyang Li
Zheyang Li
PCPeng Cui
Peng Cui
Surge reliability is a crucial aspect of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) reliability. This study investigates the degradation behavior and mechanisms of switching characteristics in 1.2 kV planar-gate SiC MOSFETs under repetitive surge current. A surge current test platform is established to conduct surge tests on the device, while monitoring the evolution of its switching characteristics. The results indicate that after 4000 surge current cycles, the device’s turn-on delay time (td(on)), rise time (tr), and turn-on loss (EON) show no significant changes. In contrast, the turn-off delay time (td(off)), fall time (tf), and turn-off loss (EOFF) increase by 9%, 7.5%, and 8.3%, respectively. Switching characteristics variations are closely linked to the reduction in threshold voltage (VTH) and the increase in gate-source capacitance (CGS) and gate-drain capacitance (CGD). The degradation of these parameters stems from the accumulation of positive trapped charge in the gate oxide layer above the channel and junction field-effect transistor (JFET) region. The increase in charges results from the combined effects of negative gate bias and cyclic high temperature induced by repetitive surge current. This study provides a theoretical basis for the comprehensive understanding of the impact of surge current on SiC MOSFET performance.