We use resonant inelastic x-ray scattering to probe the propagation of plasmons in the electron-doped cuprate superconductor ${\mathrm{Sr}}_{0.9}{\mathrm{La}}_{0.1}{\mathrm{CuO}}_2$. We detect a plasmon gap of $\sim 120\mathrm{meV}$ at the two-dimensional Brillouin zone center, indicating that low-energy plasmons in ${\mathrm{Sr}}_{0.9}{\mathrm{La}}_{0.1}{\mathrm{CuO}}_2$ are not strictly acoustic. The plasmon dispersion, including the gap, is accurately captured by layered $t\text{−}J\text{−}V$ model calculations. A similar analysis performed on recent resonant inelastic x-ray scattering data from other cuprates suggests that the plasmon gap is generic and its size is related to the magnitude of the interlayer hopping $t_z$. Our work signifies the three dimensionality of the charge dynamics in layered cuprates and provides a new method to determine $t_z$.

The use of a doped Ceria buffer layer and Physical Vapour Deposition (PVD) techniques for Solid Oxide Fuel Cells (SOFC) fabrication can limit the former, the formation of electrical insulating lanthanum, and strontium zirconates at the cathode/electrolyte interface, whereas the latter allows a better control of the materials interfaces. These effects allow for operation at intermediate temperature ranges. In this work, we study the structural and electrical properties of Gadolinium Doped Ceria (GDC) barrier layer deposited via the room temperature RF Sputtering technique on anode supported electrolytes and then annealed at high temperature. The crystal structure and the surface morphology of the GDC barrier layers have been analyzed and optimized varying the temperature ramp of the post-growth annealing procedure. The electrical behavior of the obtained samples has been investigated by Electrochemical Impedance Spectroscopy and compared to that of standard SOFC with screen-printed GDC barrier layers, the former showing a maximum high frequency and low frequency resistances reduction of about 50% and 46%, respectively, with respect to the latter at an operating temperature of 650 °C. The results clearly show an important improvement of SOFC performances when using sputter deposited GDC layers, linking the electrical properties to the structural and stoichiometric ones.

We investigate the influence of position, under large circular sputtering targets, on the final electrochemical performance of 35 mm diameter button solid oxide fuel cells with sputter-deposited Gadolinium doped Ceria barrier layers, positioned in order to almost cover the entirety of the area associated with a 120 × 80 mm² industrial cell. We compare the results obtained via structural and morphological analysis to the Electrochemical Impedance Spectroscopy (EIS) measurements performed on the button cells, disentangling the role of different parameters. The Atomic Force Microscopy analysis makes it possible to observe a decrease in the roughness values from the peripheral to the central zones under the sputtering target, with peak-to-valley roughness values, respectively, decreasing from 380 nm to 300 nm, while Scanning Electron Microscopy and Energy Dispersive Spectroscopy show a dependence of the layer coverage from the position. The electrochemical performances of button cells with buffer layers of only 200 nm in thickness, and with negligible thickness gradients across them, show current density values of up to 478 mA/cm² at 0.8 V and 650 °C, with an improvement of more than 67% with respect to button cells with standard (screen printed) buffer layers. These results point out the major influence exerted by parameters such as the thickness gradient and the coverage of the sputtered buffer layers in determining the final electrochemical performances.