This paper investigates a method for the multi-threshold segmentation of grayscale imaging using the local minimum points of a histogram curve as the segmentation threshold. By smoothing the histogram curve and judging the conditions, the expected peaks and valleys are identified, and the corresponding minimum points are used as segmentation thresholds to achieve fast multi-threshold image segmentation. Compared to the OTSU method (maximum between-class variance) for multi-threshold segmentation and the region growing method, this method has less computational complexity. In the recognition and segmentation process of solder pads with adhesion of underfill in LED Chips, the segmentation time is less than one percent of that of the OTSU method and the region growing method. The segmentation effect is better than the OTSU method and the region growing method, and it can achieve fast multi-threshold segmentation of images. Moreover, it has strong adaptability to the differences in the overall grayscale of images, meeting the requirements for high UPH (Units Per Hour) in industrial production lines.

Caching contents close to end-users can improve the network performance, while causing the problem of guaranteeing consistency. Specifically, solutions are classified into validation and invalidation, the latter of which can provide strong cache consistency strictly required in some scenarios. To date, little work on the analysis of cache invalidation has been covered. In this work, by using conditional probability to characterize the interactive relationship between existence and validity, we develop an analytical model that evaluates the performance (hit probability and server load) of four different invalidation schemes with LRU replacement under arbitrary invalidation frequency distribution. The model allows us to theoretically identify some key parameters that affect our metrics of interest and gain some common insights on parameter settings to balance the performance of cache invalidation. Compared with other cache invalidation models, our model can achieve higher accuracy in predicting the cache hit probability. We also conduct extensive simulations that demonstrate the achievable performance of our model.